Gitiles
Code Review Sign In
git01.mediatek.com / filogic / uboot / 3863f7e385922439cec64971340a2bd21d4a41bf / drivers / ddr / fsl / main.c
  1. 805cac1 mpc83xx: Get rid of CONFIG_SYS_DDR_SDRAM_BASE by Mario Six · 6 years ago
  2. 10e4779 SPDX: Convert all of our single license tags to Linux Kernel style by Tom Rini · 7 years ago
  3. bdfb5c4 Remove unnecessary instances of DECLARE_GLOBAL_DATA_PTR by Tom Rini · 7 years ago
  4. d3e6816 Revert "drivers/ddr/fsl: Dual-license DDR driver" by Tom Rini · 7 years ago
  5. 6d49eda drivers/ddr/fsl: Dual-license DDR driver by York Sun · 7 years ago
  6. d35f338 board_f: Rename initdram() to dram_init() by Simon Glass · 8 years ago
  7. 39f90ba board_f: Drop return value from initdram() by Simon Glass · 8 years ago
  8. fe84507 ddr: fsl: Merge macro CONFIG_NUM_DDR_CONTROLLERS and CONFIG_SYS_NUM_DDR_CTRLS by York Sun · 8 years ago
  9. 7ae7a0e drivers/ddr/fsl: fsl_ddr_sdram_size remove unused controllers by Ed Swarthout · 9 years ago
  10. e237880 Add more SPDX-License-Identifier tags by Tom Rini · 9 years ago
  11. d957a67 drivers/ddr/fsl: Enable detection of one DDR controller operation for LSCH3 by York Sun · 9 years ago
  12. 999273f drivers/ddr/fsl: Adjust bstopre value by York Sun · 9 years ago
  13. b10d1b7 driver/ddr/fsl: Add a hook to update SPD address by York Sun · 10 years ago
  14. 55eb5fa drivers/ddr/fsl: Update DDR driver for DDR4 by York Sun · 10 years ago
  15. 8ced050 driver/ddr/fsl: Add sync of refresh by York Sun · 10 years ago
  16. 2c0b62d driver/ddr/fsl: Add support for multiple DDR clocks by York Sun · 10 years ago
  17. db20464 linux/kernel.h: sync min, max, min3, max3 macros with Linux by Masahiro Yamada · 10 years ago
  18. 79a779b driver/ddr: Restruct driver to allow standalone memory space by York Sun · 10 years ago
  19. edbeee1 drivers/ddr: Fix possible out of bounds error by York Sun · 11 years ago
  20. 2896cb7 driver/ddr/fsl: Add DDR4 support to Freescale DDR driver by York Sun · 11 years ago
  21. c459ae6 driver/ddr: Add 256 byte interleaving support by York Sun · 11 years ago
  22. 3a0916d Driver/ddr: Add support of different DDR base address by York Sun · 11 years ago
  23. 6446f1e Driver/DDR: Update DDR driver to allow non-zero base address by York Sun · 11 years ago
  24. 461c939 Driver/DDR: Add Freescale DDR driver for ARM by York Sun · 11 years ago
  25. f062659 Driver/DDR: Moving Freescale DDR driver to a common driver by York Sun · 11 years ago[Renamed (99%) from arch/powerpc/cpu/mpc8xxx/ddr/main.c]
  26. 993967a mpc8xxx: call i2c_set_bus_num in __get_spd by Valentin Longchamp · 11 years ago
  27. 4a71741 powerpc: Fix CamelCase warnings in DDR related code by Priyanka Jain · 11 years ago
  28. 3adfb91 powerpc: Use print_size() where appropriate by Shruti Kanetkar · 11 years ago
  29. 5e15555 powerpc/mpc8xxx: Add memory reset control by York Sun · 11 years ago
  30. c21a739 powerpc/mpc8xxx: Set inactive csn_bnds to 0xffffffff by York Sun · 11 years ago
  31. 01a8258 powerpc/mpc8xxx: Allow board file to override DDR address assignment by York Sun · 12 years ago
  32. fcb60e8 powerpc/mpc8xxx: Fix DDR 3-way interleaving by York Sun · 12 years ago
  33. 4379438 powerpc/mpc8xxxx: FSL DDR debugger auto run of stored commands by James Yang · 12 years ago
  34. 5025a8d powerpc/mpc8xxx: Enable entering DDR debugging by key press by York Sun · 12 years ago
  35. 9b9372f powerpc/mpc8xxx: Fix DDR SPD failed message by York Sun · 12 years ago
  36. 016095d powerpc/mpc8xxx: Fix DDR initialization waiting for D_INIT by York Sun · 12 years ago
  37. 11dd884 powerpc/mpc8xxx DDR: Fall back to raw timing for first controller only by York Sun · 12 years ago
  38. e8dc17b powerpc/mpc8xxx: Enable 3-way and 4-way DDR interleaving by York Sun · 12 years ago
  39. 2400904 powerpc/ddr: fix fsl_ddr_get_dimm_params compile error by Shaohui Xie · 12 years ago
  40. bd495cf powerpc/8xxx: Add support for interactive DDR programming interface by York Sun · 13 years ago
  41. 92b46ac powerpc/mpc8xxx: Add SPD EEPROM address for single controller 2 slots by York Sun · 13 years ago
  42. 09d8aa8 powerpc/mpc8xxx: Adding fallback to raw timing on supported boards by York Sun · 13 years ago
  43. e73cc04 powerpc/mpc8xxx: Enable calculation for fixed DDR chips by York Sun · 13 years ago
  44. dd803dd powerpc/mpc8xxx: Add 16-bit support for DDR3 by York Sun · 14 years ago
  45. c68e86c powerpc/8xxx: Refactor fsl_ddr_get_spd into common code from board by Kumar Gala · 14 years ago
  46. 80ad401 8xxx/ddr: add support to only compute the ddr sdram size by Haiying Wang · 14 years ago
  47. 2d8ecac MPC8xxx DDR: align informational prints by Becky Bruce · 14 years ago
  48. 93799ca powerpc/8xxx: Fix bug in memctrl interleaving & bank interleaving on cs0~cs4 by york · 14 years ago
  49. 88fbf93 Move arch/ppc to arch/powerpc by Stefan Roese · 15 years ago[Renamed from arch/ppc/cpu/mpc8xxx/ddr/main.c]
  50. 29514c7 ppc: Move cpu/$CPU to arch/ppc/cpu/$CPU by Peter Tyser · 15 years ago[Renamed from cpu/mpc8xxx/ddr/main.c]
  51. f4018f9 85xx, 86xx: Add common board_add_ram_info() by Peter Tyser · 15 years ago
  52. 68ef4bd fsl-ddr: Fix handling of >4G of memory when !CONFIG_PHYS_64BIT by Kumar Gala · 15 years ago
  53. 45eea1d fsl-ddr: Allow system to boot if we have more than 4G of memory by Kumar Gala · 16 years ago
  54. b135d93 fsl ddr skip interleaving if not supported. by Ed Swarthout · 16 years ago
  55. b834f92 Check DDR interleaving mode by Haiying Wang · 16 years ago
  56. fa44036 Pass dimm parameters to populate populate controller options by Haiying Wang · 16 years ago
  57. 272b596 Make DDR interleaving mode work correctly by Haiying Wang · 16 years ago
  58. 9dbbd7b Coding style cleanup, update CHANGELOG by Wolfgang Denk · 16 years ago
  59. 124b082 FSL DDR: Rewrite the FSL mpc8xxx DDR controller setup code. by Kumar Gala · 16 years ago