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git01.mediatek.com / filogic / uboot / 36feac9703d5835de1699adfdc1646b9a7424a42 / drivers / clk / ti / clk-sci.c
  1. 1770884 clk: sci-clk: fix return value of set_rate by Tero Kristo · Fri Jun 11 11:45:10 2021 +0300
  2. d4352b8 clk: move clk-ti-sci driver to 'ti' directory by Dario Binacchi · Wed Dec 30 00:16:20 2020 +0100[Renamed from drivers/clk/clk-ti-sci.c]
  3. 8a2b47f dm: treewide: Rename auto_alloc_size members to be shorter by Simon Glass · Thu Dec 03 16:55:17 2020 -0700
  4. 0f2af88 common: Drop log.h from common header by Simon Glass · Sun May 10 11:40:05 2020 -0600
  5. 9bc1564 dm: core: Create a new header file for 'compat' features by Simon Glass · Mon Feb 03 07:36:16 2020 -0700
  6. d66c5f7 dm: core: Require users of devres to include the header by Simon Glass · Mon Feb 03 07:36:15 2020 -0700
  7. 2cdd3f4 clk: Rename free() to rfree() by Simon Glass · Mon Feb 03 07:35:54 2020 -0700
  8. 74fc6b8 clk: sci-clk: add slack to clk-set-rate passed to firmware by Lokesh Vutla · Fri Jan 17 11:57:30 2020 +0530
  9. 280d7a8 clk: clk-ti-sci: Notify AVS driver upon setting clock rate by Keerthy · Thu Oct 24 15:00:47 2019 +0530
  10. 1530e35 clk: Introduce TI System Control Interface (TI SCI) clock driver by Andreas Dannenberg · Mon Aug 27 15:57:43 2018 +0530