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git01.mediatek.com / filogic / uboot / 36ee05a6be78f63af08057c253012afac33b0190 / include / fsl_ddr_sdram.h
  1. 15875a5 fsl/ddr: Add erratum_a009942_check_cpo and clean related erratum by Shengzhou Liu · Mon Nov 21 11:36:48 2016 +0800
  2. 7c72578 driver/ddr/fsl: Add more debug registers by York Sun · Mon Aug 29 17:04:12 2016 +0800
  3. 9c3cdc2 driver/ddr/fsl: Add workaround for erratum A-009801 by Shengzhou Liu · Wed Mar 16 13:50:23 2016 +0800
  4. b2dee26 drivers/ddr/fsl: update workaround for erratum A-008511 by Shengzhou Liu · Wed Mar 16 13:50:22 2016 +0800
  5. ddf060b armv8/ls1043: Add workaround for DDR erratum A-008850 by Shengzhou Liu · Thu Apr 07 16:22:21 2016 +0800
  6. 5219944 driver/ddr/fsl: Add address parity support for DDR4 UDIMM/discrete by Shengzhou Liu · Thu Mar 10 17:36:56 2016 +0800
  7. bdda96c driver/ddr/fsl: Add workaround for A009663 by Shengzhou Liu · Wed Dec 16 16:45:41 2015 +0800
  8. e237880 Add more SPDX-License-Identifier tags by Tom Rini · Thu Jan 14 22:05:13 2016 -0500
  9. 5cb12f6 driver/ddr/fsl: Update DDR4 RTT values by York Sun · Wed Nov 04 10:03:17 2015 -0800
  10. 6dc192d drivers/ddr/fsl_ddr: Make SR_IE configurable by Joakim Tjernlund · Wed Oct 14 16:32:00 2015 +0200
  11. 0301703 armv8/ls2085aqds: Add support of LS2085AQDS platform by York Sun · Fri Mar 20 19:28:23 2015 -0700
  12. 1f8d706 driver/ddr/fsl: Add workaround for DDR erratum A008511 by York Sun · Thu Mar 19 09:30:29 2015 -0700
  13. 064f126 fsl/sleep: updated the deep sleep framework for QorIQ platforms by Tang Yuantian · Fri Nov 21 11:17:15 2014 +0800
  14. c1bf24f driver/ddr/fsl: Fix tXP and tCKE by York Sun · Thu Aug 21 16:13:22 2014 -0700
  15. 79a779b driver/ddr: Restruct driver to allow standalone memory space by York Sun · Fri Aug 01 15:51:00 2014 -0700
  16. e0f6046 driver/ddr/fsl: Add support of overriding chip select write leveling by York Sun · Fri Sep 05 13:52:43 2014 +0800
  17. a7364af mpc85xx/t104x: Add deep sleep framework support by Tang Yuantian · Thu Apr 17 15:33:46 2014 +0800
  18. 2896cb7 driver/ddr/fsl: Add DDR4 support to Freescale DDR driver by York Sun · Thu Mar 27 17:54:47 2014 -0700
  19. c459ae6 driver/ddr: Add 256 byte interleaving support by York Sun · Mon Feb 10 13:59:44 2014 -0800
  20. f062659 Driver/DDR: Moving Freescale DDR driver to a common driver by York Sun · Mon Sep 30 09:22:09 2013 -0700[Renamed (98%) from arch/powerpc/include/asm/fsl_ddr_sdram.h]
  21. 4a71741 powerpc: Fix CamelCase warnings in DDR related code by Priyanka Jain · Wed Sep 25 10:41:19 2013 +0530
  22. 5e15555 powerpc/mpc8xxx: Add memory reset control by York Sun · Tue Jun 25 11:37:48 2013 -0700
  23. 4889c98 powerpc/mpc8xxx: Add x4 DDR device support by York Sun · Tue Jun 25 11:37:47 2013 -0700
  24. 016095d powerpc/mpc8xxx: Fix DDR initialization waiting for D_INIT by York Sun · Mon Oct 08 07:44:24 2012 +0000
  25. 98df4d1 powerpc/mpc8xxx: Fix DDR driver handling quad-rank DIMMs and address calculation by York Sun · Mon Oct 08 07:44:23 2012 +0000
  26. 7d69ea3 powerpc/mpc8xxx: Update DDR registers by York Sun · Mon Oct 08 07:44:22 2012 +0000
  27. e8dc17b powerpc/mpc8xxx: Enable 3-way and 4-way DDR interleaving by York Sun · Fri Aug 17 08:22:39 2012 +0000
  28. 78fb175 p1014rdb: set ddr bus width properly depending on SVR by Matthew McClintock · Mon Aug 13 08:10:37 2012 +0000
  29. 454f507 powerpc/mpc8xxx: Add DDR2 to unified DDR driver by York Sun · Fri Aug 26 11:32:43 2011 -0700
  30. 15f874a powerpc/mpc8xxx: Fix DDR code for empty first DIMM slot and enable DQS_en by York Sun · Fri Aug 26 11:32:40 2011 -0700
  31. f8691fc powerpc/mpc8xxx: Allow override DDR read-to-write turnaround time by York Sun · Fri May 27 13:44:28 2011 +0800
  32. dd803dd powerpc/mpc8xxx: Add 16-bit support for DDR3 by York Sun · Fri May 27 07:25:51 2011 +0800
  33. 1a35f3d powerpc/85xx: don't init SDRAM when CONFIG_SYS_RAMBOOT by Zhao Chenhui · Fri Jan 28 17:58:37 2011 +0800
  34. 42d3640 fsl_ddr: Adds 16 bit DDR Data width option by Poonam Aggrwal · Mon Feb 07 15:09:51 2011 +0530
  35. 2717719 powerpc/85xx: Declare fsl_ddr_set_memctl_regs in <asm/fsl_ddr_sdram.h> by Kumar Gala · Tue Jan 25 01:48:03 2011 -0600
  36. c8fc959 powerpc/mpc85xx: implement workaround for errata DDR111 and DDR134 by York Sun · Tue Jan 25 22:05:49 2011 -0800
  37. 00a69c0 corenet_ds: Extend board specific parameters by York Sun · Mon Jan 10 12:03:02 2011 +0000
  38. 922f40f mpc85xx: Implement workaround for erratum DDR-A003 by York Sun · Mon Jan 10 12:03:01 2011 +0000
  39. ba0c2eb mpc85xx: Enable unique mode registers and dynamic ODT for DDR3 by York Sun · Mon Jan 10 12:03:00 2011 +0000
  40. 7dda847 mpc85xx: Adding more registers and options by York Sun · Mon Jan 10 12:02:59 2011 +0000
  41. f582d98 powerpc/8xxx: Move fsl_is_spd() into generic 8xxx ddr code by Kumar Gala · Sun Jan 09 14:06:28 2011 -0600
  42. 5e35d8a mpc85xx boards: initdram() cleanup/bugfix by Becky Bruce · Fri Dec 17 17:17:56 2010 -0600
  43. 269c7eb Adding fixed sdram setting for cornet_ds board by York Sun · Mon Oct 18 13:46:49 2010 -0700
  44. 4260372 powerpc/8xxx: Enabled address hashing for 85xx by york · Fri Jul 02 22:25:54 2010 +0000
  45. f4f93c6 powerpc/8xxx: Enable quad-rank DIMMs. by york · Fri Jul 02 22:25:53 2010 +0000
  46. 0489919 fsl-ddr: add the macro for Rtt_Nom definition by Dave Liu · Fri Mar 05 12:23:00 2010 +0800
  47. 88fbf93 Move arch/ppc to arch/powerpc by Stefan Roese · Thu Apr 15 16:07:28 2010 +0200[Renamed from arch/ppc/include/asm/fsl_ddr_sdram.h]
  48. 3cba3c1 Move architecture-specific includes to arch/$ARCH/include/asm by Peter Tyser · Mon Apr 12 22:28:08 2010 -0500[Renamed from include/asm-ppc/fsl_ddr_sdram.h]
  49. 2d0f125 fsl-ddr: add override for the Rtt_Wr by Dave Liu · Wed Dec 16 10:24:38 2009 -0600
  50. 64ee7df fsl-ddr: add the override for write leveling by Dave Liu · Wed Dec 16 10:24:37 2009 -0600
  51. 24aa71a ppc/8xxx: Remove ddr_pd_cntl register since it doesn't exist by Kumar Gala · Tue Sep 01 22:01:54 2009 -0500
  52. 4be87b2 fsl-ddr: add the DDR3 SPD infrastructure by Dave Liu · Sat Mar 14 12:48:30 2009 +0800
  53. 30cb145 32bit BUg fix for DDR2 on 8572 by Poonam_Aggrwal-b10812 · Sun Jan 04 08:46:38 2009 +0530
  54. 2aad0ae fsl-ddr: make the self refresh idle threshold configurable by Dave Liu · Fri Nov 21 16:31:35 2008 +0800
  55. 4758d53 fsl-ddr: clean up the ddr code for DDR3 controller by Dave Liu · Fri Nov 21 16:31:29 2008 +0800
  56. 272b596 Make DDR interleaving mode work correctly by Haiying Wang · Fri Oct 03 12:36:39 2008 -0400
  57. 124b082 FSL DDR: Rewrite the FSL mpc8xxx DDR controller setup code. by Kumar Gala · Tue Aug 26 15:01:29 2008 -0500