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git01.mediatek.com / filogic / uboot / 363b858027bdb3000a8aa68e87fa083ac6d2c1c8 / drivers / spi / cadence_qspi_apb.c
  1. 4ca6019 spi: cadence_quadspi: Enable QUAD mode based on DT data by Vignesh R · Wed Jul 06 10:20:56 2016 +0530
  2. 0c80b92 spi: cadence_qspi_apb: Support 32 bit AHB address by Vignesh R · Wed Jul 06 10:20:55 2016 +0530
  3. 8c17743 mtd: cqspi: Simplify indirect read code by Marek Vasut · Wed Apr 27 23:38:05 2016 +0200
  4. dae51dd mtd: cqspi: Simplify indirect write code by Marek Vasut · Wed Apr 27 23:18:55 2016 +0200
  5. 99d7167 spi: cadence_qspi_apb: Use BIT macro by Jagan Teki · Fri Oct 23 01:36:06 2015 +0530
  6. f206f71 spi: cadence_qspi: support FIFO width other than 4 bytes by Vikas Manocha · Thu Jul 02 18:29:45 2015 -0700
  7. 480f3b5 spi: cadence_qspi: get sram size from device tree by Vikas Manocha · Thu Jul 02 18:29:44 2015 -0700
  8. 215cea0 spi: cadence_qspi: move the sram partition in init by Vikas Manocha · Thu Jul 02 18:29:43 2015 -0700
  9. 1c60fe7 spi: Add Cadence QSPI DM driver used by SoCFPGA by Stefan Roese · Fri Nov 07 12:37:49 2014 +0100