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git01.mediatek.com / filogic / uboot / 32ec7c6e072d73420c4dfa580b37dbe1cf4b8c8f / drivers / mmc / renesas-sdhi.c
  1. 7b46176 mmc: tmio: sdhi: Add calibration tables by Marek Vasut · Sat Nov 23 13:36:25 2019 +0100
  2. 531fc99 mmc: tmio: sdhi: Skip bad taps by Marek Vasut · Sat Nov 23 13:36:24 2019 +0100
  3. 52647a0 mmc: tmio: sdhi: Add SCC error checking by Marek Vasut · Sat Nov 23 13:36:23 2019 +0100
  4. 242c63d mmc: tmio: sdhi: Disable auto-retuning in HS400 by Marek Vasut · Sat Nov 23 13:36:22 2019 +0100
  5. cf643b0 mmc: tmio: sdhi: Adjust HS400 calibration offsets by Marek Vasut · Sat Nov 23 13:36:21 2019 +0100
  6. 1a95303 mmc: tmio: sdhi: Adjust DT2FF settings for HS400 mode by Marek Vasut · Sat Nov 23 13:36:20 2019 +0100
  7. 715b325 mmc: tmio: sdhi: Use 4 tuning taps on M3W up to ES1.2 by Marek Vasut · Sat Nov 23 13:36:19 2019 +0100
  8. 0555dc6 mmc: tmio: sdhi: Track SMPCMP valu in private data by Marek Vasut · Sat Nov 23 13:36:18 2019 +0100
  9. d9d09e3 mmc: tmio: sdhi: Track current tap number in private data by Marek Vasut · Sat Nov 23 13:36:17 2019 +0100
  10. db174c6 mmc: Rename timeout parameters for clarification by Sam Protsenko · Wed Aug 14 22:52:51 2019 +0300
  11. fee0c68 mmc: tmio: sdhi: HS400 manual adjustment by Marek Vasut · Sun May 19 03:47:07 2019 +0200
  12. b1d442b mmc: tmio: sdhi: Minor macro cleanup by Marek Vasut · Sun May 19 02:33:06 2019 +0200
  13. 3d42a07 mmc: renesas: Unconditionally set DTCNTL TAPNUM to 8 by Marek Vasut · Tue Feb 19 19:32:28 2019 +0100
  14. 1a7b055 mmc: tmio: sdhi: Configure DT2FF register for HS400 mode by Marek Vasut · Thu Feb 14 15:16:15 2019 +0100
  15. e9a2822 mmc: tmio: Make DMA transfer end bit configurable by Marek Vasut · Fri Jan 11 23:45:54 2019 +0100
  16. 10d77ed mmc: tmio: sdhi: Add HS400 support by Marek Vasut · Wed Jun 13 08:02:55 2018 +0200
  17. 1ebb9d6 mmc: tmio: sdhi: Move tap_pos to private data by Marek Vasut · Wed Jun 13 08:02:55 2018 +0200
  18. b59180a mmc: tmio: sdhi: Filter out HS400 on certain SoCs by Marek Vasut · Wed Jun 13 08:02:55 2018 +0200
  19. da90a1b mmc: tmio: Switch to clock framework by Marek Vasut · Wed Jun 13 08:02:55 2018 +0200
  20. da4873d mmc: tmio: sdhi: Merge DTCNTL access into single register write by Marek Vasut · Wed Jun 13 08:02:55 2018 +0200
  21. 576a6d9 mmc: tmio: sdhi: Implement waiting for DAT0 line state by Marek Vasut · Sun Oct 28 19:28:56 2018 +0100
  22. efea7a8 mmc: tmio: sdhi: Clear HS400 settings when resetting SCC by Marek Vasut · Wed Jun 13 08:02:55 2018 +0200
  23. 3577380 mmc: tmio: sdhi: Touch SCC only when UHS capable by Marek Vasut · Sun Oct 28 15:30:06 2018 +0100
  24. da70ebb mmc: renesas-sdhi: Use priv directly by Marek Vasut · Thu Aug 30 15:27:26 2018 +0200
  25. 8b2ae7d mmc: renesas-sdhi: Add R8A77990 E3 compatible by Marek Vasut · Thu Apr 26 13:19:29 2018 +0200
  26. 10e4779 SPDX: Convert all of our single license tags to Linux Kernel style by Tom Rini · Sun May 06 17:58:06 2018 -0400
  27. 19989d83 mmc: tmio: move clk_enable() to each driver's probe function by Masahiro Yamada · Fri Apr 20 18:14:24 2018 +0900
  28. fd83e76 mmc: tmio: Rename Matsushita to TMIO by Marek Vasut · Fri Apr 13 23:51:33 2018 +0200
  29. 33d3818 mmc: renesas-sdhi: Wait after reconfiguring pins by Marek Vasut · Mon Apr 09 20:47:31 2018 +0200
  30. e0781e4 mmc: renesas-sdhi: Add Renesas SDR104/HS200 tuning support by Marek Vasut · Sun Apr 08 19:09:17 2018 +0200
  31. 9db9e6a mmc: matsushita-common: Add Renesas RCar quirks by Marek Vasut · Sun Apr 08 18:49:52 2018 +0200
  32. 1949d48 mmc: renesas-sdhi: Handle 16bit IP by Marek Vasut · Sun Apr 08 18:14:22 2018 +0200
  33. abe3e95 mmc: uniphier: Allow passing quirks to the probe function by Marek Vasut · Sun Apr 08 17:45:23 2018 +0200
  34. 06485cf mmc: uniphier: Split out SoC specific bits from the driver by Marek Vasut · Sun Apr 08 15:22:58 2018 +0200