Gitiles
Code Review
Sign In
git01.mediatek.com
/
filogic
/
uboot
/
3263e748a19043c290316fe7d2aefa15c2866dcb
/
drivers
/
clk
/
renesas
48de37a
Merge tag 'dm-pull-20jul20-take2a' of https://gitlab.denx.de/u-boot/custodians/u-boot-dm
by Tom Rini
· Mon Jul 27 11:15:37 2020 -0400
1096ae1
treewide: convert (void *)devfdt_get_addr() to dev_read_addr_ptr()
by Masahiro Yamada
· Fri Jul 17 14:36:46 2020 +0900
06c4f9b
clk: renesas: Add R8A774A1 clock tables
by Adam Ford
· Tue Jun 30 09:30:08 2020 -0500
5a9ecb2
Revert "Merge tag 'dm-pull-20jul20' of git://git.denx.de/u-boot-dm"
by Tom Rini
· Fri Jul 24 08:42:06 2020 -0400
a3332a1
treewide: convert (void *)devfdt_get_addr() to dev_read_addr_ptr()
by Masahiro Yamada
· Fri Jul 17 14:36:46 2020 +0900
4dcacfc
common: Drop linux/bitops.h from common header
by Simon Glass
· Sun May 10 11:40:13 2020 -0600
0f2af88
common: Drop log.h from common header
by Simon Glass
· Sun May 10 11:40:05 2020 -0600
ab11876
clk: renesas: Switch to fdtdec_get_addr_size_auto_noparent() on Gen2
by Marek Vasut
· Sat Mar 21 16:45:29 2020 +0100
d52c6cb
clk: renesas: Add R8A77980 V3H clock tables
by Marek Vasut
· Mon Jul 29 19:59:44 2019 +0200
7841483
clk: renesas: Synchronize Gen3 tables with Linux 5.0
by Marek Vasut
· Mon Mar 04 21:38:10 2019 +0100
3bee488
clk: renesas: Synchronize Gen2 tables with Linux 5.0
by Marek Vasut
· Mon Mar 04 21:23:25 2019 +0100
98c2058
clk: renesas: Add R8A77965 clock tables
by Marek Vasut
· Mon Mar 04 13:36:13 2019 +0100
0f6aa07
clk: renesas: Add support for setting MMCIF clock divider on Gen2
by Marek Vasut
· Mon Mar 18 06:04:02 2019 +0100
31872db
clk: renesas: Fix swapped div and mul in debug output on Gen2
by Marek Vasut
· Mon Mar 18 05:38:08 2019 +0100
272daa7
clk: renesas: Fix SDH clock divider decoding on Gen2
by Marek Vasut
· Mon Mar 18 05:11:42 2019 +0100
d0bb61b
clk: rmobile: Drop def_bool per SoC
by Marek Vasut
· Mon Feb 18 13:22:47 2019 +0100
c26bf89
clk: renesas: Allow reconfiguring SDHI clock on Gen3
by Marek Vasut
· Tue Oct 30 17:54:20 2018 +0100
2447b74
clk: rmobile: Add R8A77995 RPC clock
by Marek Vasut
· Thu Jun 14 05:26:31 2018 +0200
69be062
clk: rmobile: Add R8A77990 RPC clock
by Marek Vasut
· Wed Jun 13 21:25:24 2018 +0200
2467224
Merge branch 'master' of git://git.denx.de/u-boot-sh
by Tom Rini
· Fri Jun 01 21:10:18 2018 -0400
a6b456d
clk: renesas: Add R8A77990 E3 clock tables
by Marek Vasut
· Thu Apr 26 10:19:03 2018 +0200
69459b2
clk: renesas: Add PE clock handling
by Marek Vasut
· Thu May 31 19:47:42 2018 +0200
52389f0
clk: renesas: Add PLL1 and PLL3 dividers
by Marek Vasut
· Thu May 31 19:25:41 2018 +0200
7571ac4
clk: renesas: Pass clock rate around as 64bit number internally
by Marek Vasut
· Thu May 31 19:06:02 2018 +0200
31de3d8
clk: renesas: Fix swapped arguments in debug message
by Marek Vasut
· Thu May 31 18:56:35 2018 +0200
10e4779
SPDX: Convert all of our single license tags to Linux Kernel style
by Tom Rini
· Sun May 06 17:58:06 2018 -0400
031f404
clk: renesas: Drop USB extal from the R8A7792 clock driver
by Marek Vasut
· Wed May 02 10:48:15 2018 +0200
dada109
clk: renesas: Minor clean up of the R8A7794 clock driver
by Marek Vasut
· Sat Apr 21 16:35:49 2018 +0200
f5ff753
clk: renesas: Minor clean up of the R8A7792 clock driver
by Marek Vasut
· Sat Apr 21 16:36:54 2018 +0200
f40c4cf
clk: renesas: Minor clean up of the R8A7790 clock driver
by Marek Vasut
· Thu Apr 12 15:23:46 2018 +0200
284e94c
clk: renesas: Add R8A77965 M3N entries
by Marek Vasut
· Mon Feb 26 10:35:15 2018 +0100
414dbbe
clk: rmobile: Assure SD-IF clock are configured correctly
by Marek Vasut
· Thu Jan 11 16:28:31 2018 +0100
357f199
Merge branch 'rmobile-mx' of git://git.denx.de/u-boot-sh
by Tom Rini
· Sat Jan 27 14:50:52 2018 -0500
3fd0b09
clk: renesas: Import R8A7794 E2 clock tables
by Marek Vasut
· Wed Jan 17 23:39:57 2018 +0100
5f854a3
clk: renesas: Import R8A7792 V2H clock tables
by Marek Vasut
· Wed Jan 17 23:39:10 2018 +0100
efa4fb1
clk: renesas: Import R8A7791/R8A7793 M2 clock tables
by Marek Vasut
· Mon Jan 08 16:38:51 2018 +0100
b8379d6
clk: renesas: Import R8A7790 H2 clock tables
by Marek Vasut
· Wed Jan 17 23:14:25 2018 +0100
f63b295
clk: renesas: Add Gen2 clock core
by Marek Vasut
· Mon Jan 08 16:38:51 2018 +0100
32ae81e
clk: renesas: Add DIV6P1 clock type
by Marek Vasut
· Thu Jan 18 00:05:28 2018 +0100
e11008b
clk: renesas: Split out code shared between Gen2 and Gen3
by Marek Vasut
· Mon Jan 15 16:44:39 2018 +0100
1a10f19
clk: renesas: Make clock tables Kconfig configurable
by Marek Vasut
· Mon Jan 08 16:32:38 2018 +0100
2eb56a1
clk: renesas: Split SMSTPCR and RMSTPCR tables
by Marek Vasut
· Mon Jan 15 00:58:35 2018 +0100
7ef12c2
clk: renesas: Pull Gen3 specific bits into separate header
by Marek Vasut
· Mon Jan 08 17:09:45 2018 +0100
28f9004
clk: renesas: Make PLL configurations per-SoC
by Marek Vasut
· Tue Jan 16 19:23:17 2018 +0100
b923419
clk: renesas: Make clk_ids per-driver
by Marek Vasut
· Mon Jan 08 16:05:28 2018 +0100
4eb4e6e
clk: renesas: Split RCar Gen3 driver
by Marek Vasut
· Mon Jan 08 14:01:40 2018 +0100
918de03
wait_bit: use wait_for_bit_le32 and remove wait_for_bit
by Álvaro Fernández Rojas
· Tue Jan 23 17:14:55 2018 +0100
fb0aa29
clk: rmobile: Add R8A77995 D3 clock tables
by Marek Vasut
· Sun Oct 08 21:09:15 2017 +0200
3f1a3a1
clk: rmobile: Add R8A77970 V3M clock tables
by Marek Vasut
· Mon Oct 09 20:52:33 2017 +0200
314ecf6
clk: rmobile: Fix typo in R8A7796 RPC clock table entry
by Marek Vasut
· Thu Nov 30 03:01:52 2017 +0100
f0c152f
clk: rmobile: Add R8A7796 xHCI clock
by Marek Vasut
· Fri Nov 10 23:17:51 2017 +0100
df6a114
clk: rmobile: Move preboot clock shutdown to the driver
by Marek Vasut
· Sat Nov 25 22:08:55 2017 +0100
c1aee32
clk: rmobile: Add RPC hyperflash clock
by Marek Vasut
· Fri Sep 15 21:10:29 2017 +0200
5a51be5
clk: rmobile: Add support for setting SDxCKCR
by Marek Vasut
· Fri Sep 15 21:10:08 2017 +0200
9390109
clk: rmobile: Split R8A7795 and R8A7796 core clock tables
by Marek Vasut
· Sun Aug 20 17:13:39 2017 +0200
f3b8bf7
clk: rmobile: Add RCar Gen3 clock driver
by Marek Vasut
· Fri Jul 21 23:18:03 2017 +0200