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git01.mediatek.com / filogic / uboot / 3215268af977d6dbf8a59771fb175228b5179ba1 / include / clk / sunxi.h
  1. 86b561c reset: sunxi: Reuse the platform data from the clock driver by Samuel Holland · Mon May 09 00:29:37 2022 -0500
  2. 9031532 clk: sunxi: Convert driver private data to platform data by Samuel Holland · Mon May 09 00:29:35 2022 -0500
  3. 751c6c6 clk: sunxi: Use a single driver for all variants by Samuel Holland · Mon May 09 00:29:34 2022 -0500
  4. 1567fdf reset: sunxi: Get the reset count from the CCU descriptor by Samuel Holland · Mon May 09 00:29:33 2022 -0500
  5. 8443650 clk: sunxi: Store the array sizes in the CCU descriptor by Samuel Holland · Mon May 09 00:29:31 2022 -0500
  6. 2d1864f clk: sunxi: add and use dummy gate clocks by Andre Przywara · Thu May 05 01:25:43 2022 +0100
  7. 47b4c02 doc: replace @return by Return: by Heinrich Schuchardt · Wed Jan 19 18:05:50 2022 +0100
  8. 12e3faa clk: sunxi: Move header out of arch directory by Samuel Holland · Sun Sep 12 11:48:43 2021 -0500[Renamed (93%) from arch/arm/include/asm/arch-sunxi/ccu.h]
  9. 4dcacfc common: Drop linux/bitops.h from common header by Simon Glass · Sun May 10 11:40:13 2020 -0600
  10. 7f6c2a8 reset: Add Allwinner RESET driver by Jagan Teki · Fri Jan 18 22:18:13 2019 +0530
  11. 1d150b4 clk: Add Allwinner A64 CLK driver by Jagan Teki · Sat Dec 22 21:32:49 2018 +0530