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git01.mediatek.com / filogic / uboot / 31cf6f9cfcc6429d5fd88f3ab2b8f620733d2730 / drivers / net / phy / teranetics.c
  1. 856f32f powerpc/85xx: wait for alignment before resetting SERDES RX lanes (SERDES9) by Timur Tabi · Tue Oct 18 18:44:34 2011 -0500
  2. a07b497 phylib: wait for TN2020 to achieve SERDES lane alignment at startup by Timur Tabi · Fri Oct 07 15:35:21 2011 -0500
  3. 9d85174 phylib: Work around bug in Teranetics PHY by Andy Fleming · Wed Apr 20 18:41:17 2011 -0500
  4. 60ca78b phylib: Add a bunch of PHY drivers from tsec by Andy Fleming · Thu Apr 07 21:56:05 2011 -0500