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git01.mediatek.com / filogic / uboot / 2ec89a8a6ef789d4235552690226a324ab7d4f6a / arch / x86 / cpu / ivybridge / cpu.c
  1. 1375e9a x86: ivybridge: Use reset_cpu() by Simon Glass · Tue Apr 28 20:11:30 2015 -0600
  2. 06e694f x86: chromebook_link: dts: Add PCH and LPC devices by Simon Glass · Thu Mar 26 09:29:29 2015 -0600
  3. e0e7b36 dm: x86: pci: Convert chromebook_link to use driver model for pci by Simon Glass · Thu Mar 05 12:25:33 2015 -0700
  4. 7567f46 x86: Split up arch_cpu_init() by Simon Glass · Thu Mar 05 12:25:17 2015 -0700
  5. 240d06d x86: Add a x86_ prefix to the x86-specific PCI functions by Simon Glass · Thu Mar 05 12:25:15 2015 -0700
  6. 9281eb5 x86: ivybridge: Update microcode early in boot by Simon Glass · Thu Jan 01 16:18:14 2015 -0700
  7. 666534f x86: ivybridge: Drop support for ROM caching by Simon Glass · Thu Jan 01 16:18:06 2015 -0700
  8. 642d248 x86: Add post failure codes for bist and car by Bin Meng · Fri Dec 12 21:05:30 2014 +0800
  9. d22f5c9 x86: ivybridge: Add LAPIC support by Simon Glass · Wed Nov 12 22:42:27 2014 -0700
  10. 30580fc x86: ivybridge: Add early init for PCH devices by Simon Glass · Wed Nov 12 22:42:23 2014 -0700
  11. f79d538 x86: ivybridge: Perform Intel microcode update on boot by Simon Glass · Wed Nov 12 22:42:21 2014 -0700
  12. 367077a x86: ivybridge: Check BIST value on boot by Simon Glass · Wed Nov 12 22:42:20 2014 -0700
  13. f226c41 x86: ivybridge: Perform initial CPU setup by Simon Glass · Wed Nov 12 22:42:19 2014 -0700
  14. dcfac35 x86: ivybridge: Add early LPC init so that serial works by Simon Glass · Wed Nov 12 22:42:15 2014 -0700
  15. 3274ae0 x86: ivybridge: Enable PCI in early init by Simon Glass · Wed Nov 12 22:42:13 2014 -0700
  16. 98f139b x86: chromebook_link: Implement CAR support (cache as RAM) by Simon Glass · Wed Nov 12 22:42:10 2014 -0700
  17. 0b36ecd x86: Add chromebook_link board by Simon Glass · Wed Nov 12 22:42:07 2014 -0700