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git01.mediatek.com
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filogic
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uboot
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2e9d64fc13b4202241df1413b03d28479847c6b9
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drivers
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clk
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mediatek
94fc842
clk: mediatek: use unsigned type for returning the clk rate
by Fabien Parent
· Thu Oct 17 21:02:05 2019 +0200
65da8e7
clk: mediatek: fix clock-rate overflow problem
by developer
· Fri Jan 10 16:30:30 2020 +0800
dea5651
clk: mediatek: add driver for MT7622
by developer
· Fri Jan 10 16:30:29 2020 +0800
ef45feb
clk: mediatek: mt7629: add support for ssusbsys
by developer
· Thu Jan 09 11:35:04 2020 +0800
0b5e5f1
clk: mediatek: add configurable pcw_chg_reg/ibits/fmin to mtk_pll
by developer
· Tue Dec 31 11:29:22 2019 +0800
ba560c7
clk: mediatek: add set_clr_upd mux type flow
by developer
· Tue Dec 31 11:29:21 2019 +0800
4a79703
clk: mediatek: add driver support for MT8512
by developer
· Tue Dec 31 11:29:20 2019 +0800
5817d5c
clk: mediatek: add driver for MT8518
by developer
· Thu Nov 07 19:28:41 2019 +0800
a588d15
clk: MediaTek: add hifsys entry for MT7623 SoC.
by developer
· Mon Jul 29 22:17:48 2019 +0800
1fe5ad0
clk: mediatek: add driver for MT8516
by Fabien Parent
· Sun Mar 24 16:46:36 2019 +0100
69463e5
clk: mediatek: add support for SETCLR_INV and NO_SETCLR flags
by Fabien Parent
· Sun Mar 24 16:46:35 2019 +0100
0225945
clk: MediaTek: bind ethsys reset controller
by developer
· Thu Dec 20 16:12:52 2018 +0800
d1b1ffa
clk: MediaTek: add clock driver for MT7623 SoC.
by developer
· Thu Nov 15 10:07:55 2018 +0800
2186c98
clk: MediaTek: add clock driver for MT7629 SoC.
by developer
· Thu Nov 15 10:07:54 2018 +0800