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git01.mediatek.com / filogic / uboot / 2c6fca3d6e3739c0be40ba5d8ca118eb28439ffc / arch / arm / cpu / armv7 / socfpga / spl.c
  1. 2c6fca3 arm: socfpga: spl: enable sdram, timer and uart by Dinh Nguyen · 10 years ago
  2. ffdb488 remove unnecessary version.h includes by Rob Herring · 10 years ago
  3. e0098b37 arm: socfpga: clock: Clean up bit definitions by Marek Vasut · 10 years ago
  4. 112cb0d socfpga: Fix SOCFPGA build error for Altera dev kit by Chin Liang See · 10 years ago
  5. 6355024 socfpga: Adding Scan Manager driver by Chin Liang See · 10 years ago
  6. cb35060 socfpga: Adding Clock Manager driver by Chin Liang See · 11 years ago
  7. 6ae4473 socfpga: Adding Freeze Controller driver by Chin Liang See · 11 years ago
  8. 70fa4e7 socfpga: Adding System Manager driver by Chin Liang See · 11 years ago
  9. d79de1d Add GPL-2.0+ SPDX-License-Identifier to source files by Wolfgang Denk · 11 years ago
  10. d58778d socfpga/spl: Remove malloc.h by Vikram Narayanan · 12 years ago
  11. 4d0fde7 socfpga/spl: Remove timer_init from spl_board_init by Vikram Narayanan · 12 years ago
  12. ad51f7c ARM: Add Altera SOCFPGA Cyclone5 by Dinh Nguyen · 12 years ago