Gitiles
Code Review
Sign In
git01.mediatek.com
/
filogic
/
uboot
/
293f4978c9b7278077d0244ca0693dd02a0c7ad1
/
arch
/
x86
293f497
x86: Use consistent name XXX_ADDR for binary blob flash address
by Bin Meng
· Wed Dec 17 15:50:42 2014 +0800
2f32622
x86: Add queensbay and crownbay Kconfig files
by Bin Meng
· Wed Dec 17 15:50:40 2014 +0800
ba73550
x86: Enable the queensbay cpu directory build
by Bin Meng
· Wed Dec 17 15:50:39 2014 +0800
9b64969
x86: ich6-gpio: Add Intel Tunnel Creek GPIO support
by Bin Meng
· Wed Dec 17 15:50:38 2014 +0800
8bfe066
x86: Convert microcode format to device-tree-only
by Simon Glass
· Wed Dec 17 15:50:37 2014 +0800
08e484c
x86: Add basic support to queensbay platform and crownbay board
by Bin Meng
· Wed Dec 17 15:50:36 2014 +0800
da37e75
x86: Integrate Tunnel Creek processor microcode
by Bin Meng
· Wed Dec 17 15:50:35 2014 +0800
c8a5c41
x86: Correct problems in the microcode loading
by Simon Glass
· Mon Dec 15 22:02:41 2014 -0700
44679e7
x86: ivybridge: Update the microcode
by Simon Glass
· Mon Dec 15 22:02:40 2014 -0700
026d63d
x86: Move microcode updates into a separate directory
by Simon Glass
· Mon Dec 15 22:02:39 2014 -0700
d0506f7
x86: move arch-specific asmlinkage to <asm/linkage.h>
by Masahiro Yamada
· Wed Dec 03 17:36:57 2014 +0900
90699df
x86: Add a simple command to show FSP HOB information
by Bin Meng
· Fri Dec 12 21:05:32 2014 +0800
005f0af
x86: Support Intel FSP initialization path in start.S
by Bin Meng
· Fri Dec 12 21:05:31 2014 +0800
642d248
x86: Add post failure codes for bist and car
by Bin Meng
· Fri Dec 12 21:05:30 2014 +0800
01223e3
x86: queensbay: Adapt FSP support codes
by Bin Meng
· Fri Dec 12 21:05:29 2014 +0800
2922b3e
x86: Initial import from Intel FSP release for Queensbay platform
by Bin Meng
· Fri Dec 12 21:05:28 2014 +0800
0966130
x86: Add a simple superio driver for SMSC LPC47M
by Bin Meng
· Fri Dec 12 21:05:25 2014 +0800
115b5e3
x86: Add Intel Crown Bay board dts file
by Bin Meng
· Fri Dec 12 21:05:24 2014 +0800
a55173f
x86: ich6-gpio: Move setup_pch_gpios() to board support codes
by Bin Meng
· Fri Dec 12 21:05:23 2014 +0800
8c5acf4
x86: Clean up asm-offsets
by Bin Meng
· Fri Dec 12 21:05:22 2014 +0800
c191ab7
x86: Make ROM_SIZE configurable in Kconfig
by Bin Meng
· Fri Dec 12 21:05:19 2014 +0800
e722852
Replace <compiler.h> with <linux/compiler.h>
by Masahiro Yamada
· Wed Nov 26 16:00:58 2014 +0900
17def7d
Kbuild: introduce Makefile in arch/$ARCH/
by Daniel Schwierzeck
· Fri Nov 21 23:51:33 2014 +0100
85ff0b1
x86: dts: Add video information to the device tree
by Simon Glass
· Fri Nov 14 20:56:37 2014 -0700
d90f8e1
x86: Add initial video device init for Intel GMA
by Simon Glass
· Fri Nov 14 20:56:36 2014 -0700
b2978d3
x86: Add support for running option ROMs natively
by Simon Glass
· Fri Nov 14 20:56:32 2014 -0700
5ecb847
x86: Add vesa mode configuration options
by Simon Glass
· Fri Nov 14 20:56:30 2014 -0700
9fc71c1
x86: Add GDT descriptors for option ROMs
by Simon Glass
· Fri Nov 14 20:56:29 2014 -0700
61612ed
x86: ivybridge: Add northbridge init functions
by Simon Glass
· Mon Nov 24 21:18:18 2014 -0700
2b256ad
x86: Drop some msr functions that we don't support
by Simon Glass
· Mon Nov 24 21:18:17 2014 -0700
cf46d37
x86: Add init for model 206AX CPU
by Simon Glass
· Mon Nov 24 21:18:16 2014 -0700
3121dbd
x86: Add LAPIC setup code
by Simon Glass
· Mon Nov 24 21:18:15 2014 -0700
2096c8f
x86: Drop old CONFIG_INTEL_CORE_ARCH code
by Simon Glass
· Mon Nov 24 21:18:14 2014 -0700
cb9d9cb
x86: Refactor interrupt_init()
by Bin Meng
· Thu Nov 20 16:11:16 2014 +0800
57a6cd8
x86: Remove cpu_init_r() for x86
by Bin Meng
· Thu Nov 20 16:11:00 2014 +0800
25727c2
x86: Call cpu_init_interrupts() from interrupt_init()
by Bin Meng
· Thu Nov 20 16:10:49 2014 +0800
e804501
x86: Add Intel speedstep and turbo mode code
by Simon Glass
· Fri Nov 14 18:18:43 2014 -0700
79248a1
x86: ivybridge: Set up XHCI USB
by Simon Glass
· Fri Nov 14 18:18:42 2014 -0700
194d757
x86: ivybridge: Set up EHCI USB
by Simon Glass
· Fri Nov 14 18:18:40 2014 -0700
585be5f
x86: dts: Add SATA settings for link
by Simon Glass
· Fri Nov 14 18:18:39 2014 -0700
cd0adb3
x86: ivybridge: Add SATA init
by Simon Glass
· Fri Nov 14 18:18:38 2014 -0700
c1fd69e
x86: dts: Add LPC settings for link
by Simon Glass
· Fri Nov 14 18:18:37 2014 -0700
eec39ba
x86: dts: Move PCI peripherals into a pci node
by Simon Glass
· Fri Nov 14 18:18:36 2014 -0700
06409c9
x86: ivybridge: Add additional LPC init
by Simon Glass
· Fri Nov 14 18:18:35 2014 -0700
f307708
x86: ivybridge: Add PCH init
by Simon Glass
· Fri Nov 14 18:18:34 2014 -0700
2e5bb5f
x86: Add a simple header file for ACPI
by Simon Glass
· Fri Nov 14 18:18:33 2014 -0700
17f1c40
x86: ivybridge: Add support for BD82x6x PCH
by Simon Glass
· Fri Nov 14 18:18:32 2014 -0700
0e9c633
x86: Set up edge triggering on interrupt 9
by Simon Glass
· Fri Nov 14 18:18:31 2014 -0700
75a042b
x86: pci: Add handlers before and after a PCI hose scan
by Simon Glass
· Fri Nov 14 18:18:28 2014 -0700
31f88f4
x86: Add ioapic.h header
by Simon Glass
· Fri Nov 14 18:18:27 2014 -0700
20ec253
x86: Factor out common values in the link script
by Simon Glass
· Fri Nov 14 18:18:25 2014 -0700
1eb8ebc
x86: Ensure that all relocation data is included in the image
by Simon Glass
· Fri Nov 14 18:18:24 2014 -0700
2a883d7
x86: Panic if there is no relocation data
by Simon Glass
· Fri Nov 14 18:18:23 2014 -0700
d9de96d
x86: Remove board_early_init_r()
by Simon Glass
· Fri Nov 14 18:18:22 2014 -0700
6e3af1e
x86: Add ivybridge directory to Makefile
by Simon Glass
· Mon Nov 24 21:18:20 2014 -0700
b660ae7
Merge git://git.denx.de/u-boot-x86
by Tom Rini
· Mon Nov 24 12:00:00 2014 -0500
2024319
x86: use CONFIG_SYS_COREBOOT to descend into coreboot/ directory
by Masahiro Yamada
· Thu Nov 13 12:28:41 2014 +0900
40e73b1
kbuild: Descend into SOC directory from CPU directory
by Masahiro Yamada
· Thu Nov 13 12:28:40 2014 +0900
db20464
linux/kernel.h: sync min, max, min3, max3 macros with Linux
by Masahiro Yamada
· Fri Nov 07 03:03:31 2014 +0900
26a2240
x86: Rename chromebook-x86 to coreboot
by Simon Glass
· Wed Nov 12 22:42:29 2014 -0700
268eefd
x86: ivybridge: Implement SDRAM init
by Simon Glass
· Wed Nov 12 22:42:28 2014 -0700
d22f5c9
x86: ivybridge: Add LAPIC support
by Simon Glass
· Wed Nov 12 22:42:27 2014 -0700
9f0afe7
x86: Make show_boot_progress() common
by Simon Glass
· Wed Nov 12 22:42:26 2014 -0700
9a44768
x86: chromebook_link: Enable GPIO support
by Simon Glass
· Wed Nov 12 22:42:25 2014 -0700
60af017
x86: ivybridge: Add support for early GPIO init
by Simon Glass
· Wed Nov 12 22:42:24 2014 -0700
30580fc
x86: ivybridge: Add early init for PCH devices
by Simon Glass
· Wed Nov 12 22:42:23 2014 -0700
0c84eec
x86: dts: Add microcode updates for ivybridge CPU
by Simon Glass
· Wed Nov 12 22:42:22 2014 -0700
f79d538
x86: ivybridge: Perform Intel microcode update on boot
by Simon Glass
· Wed Nov 12 22:42:21 2014 -0700
367077a
x86: ivybridge: Check BIST value on boot
by Simon Glass
· Wed Nov 12 22:42:20 2014 -0700
f226c41
x86: ivybridge: Perform initial CPU setup
by Simon Glass
· Wed Nov 12 22:42:19 2014 -0700
f41118e
x86: Add msr read/write functions that use a structure
by Simon Glass
· Wed Nov 12 22:42:18 2014 -0700
d57ad48
x86: Add clr/setbits functions
by Simon Glass
· Wed Nov 12 22:42:17 2014 -0700
59762bc
x86: Tidy up coreboot header usage
by Simon Glass
· Wed Nov 12 22:42:16 2014 -0700
dcfac35
x86: ivybridge: Add early LPC init so that serial works
by Simon Glass
· Wed Nov 12 22:42:15 2014 -0700
a205b1d
x86: pci: Allow configuration before relocation
by Simon Glass
· Wed Nov 12 22:42:14 2014 -0700
3274ae0
x86: ivybridge: Enable PCI in early init
by Simon Glass
· Wed Nov 12 22:42:13 2014 -0700
a54d981
x86: Support use of PCI before relocation
by Simon Glass
· Wed Nov 12 22:42:12 2014 -0700
7680550
x86: Refactor PCI to permit alternate init
by Simon Glass
· Wed Nov 12 22:42:11 2014 -0700
98f139b
x86: chromebook_link: Implement CAR support (cache as RAM)
by Simon Glass
· Wed Nov 12 22:42:10 2014 -0700
245561d
x86: Emit post codes in startup code for Chromebooks
by Simon Glass
· Wed Nov 12 22:42:09 2014 -0700
6622b34
x86: Build a .rom file which can be flashed to an x86 machine
by Simon Glass
· Wed Nov 12 22:42:08 2014 -0700
0b36ecd
x86: Add chromebook_link board
by Simon Glass
· Wed Nov 12 22:42:07 2014 -0700
40a8c35
x86: Allow timer calibration to work on ivybridge
by Simon Glass
· Wed Nov 12 22:42:04 2014 -0700
588751a
x86: use CONFIG_SYS_COREBOOT to descend into coreboot/ directory
by Masahiro Yamada
· Thu Nov 13 12:28:41 2014 +0900
543bb14
x86: Replace fill_processor_name() with cpu_get_name()
by Simon Glass
· Mon Nov 10 18:00:26 2014 -0700
2e733b1
x86: Remove unnecessary find_fdt(), prepare_fdt() functions
by Simon Glass
· Mon Nov 10 18:00:25 2014 -0700
be36df6
x86: Add processor functions to halt and get stack pointer
by Simon Glass
· Mon Nov 10 18:00:24 2014 -0700
14a89a9
x86: Fix a warning with gcc 4.4.4
by Simon Glass
· Wed Nov 12 20:27:55 2014 -0700
aed37bf
x86: Save TSC frequency in the global data
by Bin Meng
· Sun Nov 09 22:19:35 2014 +0800
bba9705
x86: Add quick TSC calibration via PIT
by Bin Meng
· Sun Nov 09 22:19:25 2014 +0800
49f7099
x86: Do TSC MSR calibration only for known/supported CPUs
by Bin Meng
· Sun Nov 09 22:19:13 2014 +0800
035c1d2
x86: Do CPU identification in the early phase
by Bin Meng
· Sun Nov 09 22:18:56 2014 +0800
1f4476c
x86: Save the BIST value on reset
by Simon Glass
· Thu Nov 06 13:20:10 2014 -0700
8337433
x86: Fix up some missing prototypes
by Simon Glass
· Thu Nov 06 13:20:08 2014 -0700
19a8b12
x86: Use the standard arch_cpu_init() function
by Simon Glass
· Thu Nov 06 13:20:06 2014 -0700
8aa7873
x86: Use the standard dram_init() function
by Simon Glass
· Thu Nov 06 13:20:05 2014 -0700
a4fd0db
x86: Tidy up global descriptor table setup
by Simon Glass
· Thu Nov 06 13:20:04 2014 -0700
727c414
x86: Invalidate TLB as early as possible
by Simon Glass
· Thu Nov 06 13:20:03 2014 -0700
cbfd7ff
x86: Remove board_init16() call which is not used
by Simon Glass
· Thu Nov 06 13:20:01 2014 -0700
0a50d3b
x86: Remove REALMODE_BASE which is no longer used
by Simon Glass
· Thu Nov 06 13:20:00 2014 -0700
Next »