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git01.mediatek.com / filogic / uboot / 268eefd27927a4d07d87590c93102e505b5edf47 / arch / x86 / cpu / ivybridge
  1. 268eefd x86: ivybridge: Implement SDRAM init by Simon Glass · Wed Nov 12 22:42:28 2014 -0700
  2. d22f5c9 x86: ivybridge: Add LAPIC support by Simon Glass · Wed Nov 12 22:42:27 2014 -0700
  3. 30580fc x86: ivybridge: Add early init for PCH devices by Simon Glass · Wed Nov 12 22:42:23 2014 -0700
  4. f79d538 x86: ivybridge: Perform Intel microcode update on boot by Simon Glass · Wed Nov 12 22:42:21 2014 -0700
  5. 367077a x86: ivybridge: Check BIST value on boot by Simon Glass · Wed Nov 12 22:42:20 2014 -0700
  6. f226c41 x86: ivybridge: Perform initial CPU setup by Simon Glass · Wed Nov 12 22:42:19 2014 -0700
  7. dcfac35 x86: ivybridge: Add early LPC init so that serial works by Simon Glass · Wed Nov 12 22:42:15 2014 -0700
  8. 3274ae0 x86: ivybridge: Enable PCI in early init by Simon Glass · Wed Nov 12 22:42:13 2014 -0700
  9. 98f139b x86: chromebook_link: Implement CAR support (cache as RAM) by Simon Glass · Wed Nov 12 22:42:10 2014 -0700
  10. 0b36ecd x86: Add chromebook_link board by Simon Glass · Wed Nov 12 22:42:07 2014 -0700