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git01.mediatek.com / filogic / uboot / 26517afe9113fb6c5331df640c5ca79e859110bd / drivers / clk / mediatek
  1. 4b1c515 clk: mediatek: Add MT8183 clock driver by Fabien Parent · Sat Oct 17 12:52:15 2020 +0200
  2. 65130cd dm: Rename DM_GET_DRIVER() to DM_DRIVER_GET() by Simon Glass · Mon Dec 28 20:34:56 2020 -0700
  3. 8a2b47f dm: treewide: Rename auto_alloc_size members to be shorter by Simon Glass · Thu Dec 03 16:55:17 2020 -0700
  4. e51b57a clk: mt7622: add needed clocks for ssusb-node by Frank Wunderlich · Thu Aug 20 16:37:55 2020 +0200
  5. cee08a1 reset: drop unnecessary comment for pciesys by Frank Wunderlich · Thu Aug 20 16:37:53 2020 +0200
  6. 8bdcb39 reset: add basic reset controller for pciesys by Frank Wunderlich · Thu Aug 13 10:20:46 2020 +0200
  7. 420e8bf clk: mediatek: add pciesys support for MT7622 SoC by developer · Mon Aug 10 16:17:08 2020 +0800
  8. 4dcacfc common: Drop linux/bitops.h from common header by Simon Glass · Sun May 10 11:40:13 2020 -0600
  9. dbd7954 common: Drop linux/delay.h from common header by Simon Glass · Sun May 10 11:40:11 2020 -0600
  10. 0f2af88 common: Drop log.h from common header by Simon Glass · Sun May 10 11:40:05 2020 -0600
  11. 94fc842 clk: mediatek: use unsigned type for returning the clk rate by Fabien Parent · Thu Oct 17 21:02:05 2019 +0200
  12. 65da8e7 clk: mediatek: fix clock-rate overflow problem by developer · Fri Jan 10 16:30:30 2020 +0800
  13. dea5651 clk: mediatek: add driver for MT7622 by developer · Fri Jan 10 16:30:29 2020 +0800
  14. ef45feb clk: mediatek: mt7629: add support for ssusbsys by developer · Thu Jan 09 11:35:04 2020 +0800
  15. 0b5e5f1 clk: mediatek: add configurable pcw_chg_reg/ibits/fmin to mtk_pll by developer · Tue Dec 31 11:29:22 2019 +0800
  16. ba560c7 clk: mediatek: add set_clr_upd mux type flow by developer · Tue Dec 31 11:29:21 2019 +0800
  17. 4a79703 clk: mediatek: add driver support for MT8512 by developer · Tue Dec 31 11:29:20 2019 +0800
  18. 5817d5c clk: mediatek: add driver for MT8518 by developer · Thu Nov 07 19:28:41 2019 +0800
  19. a588d15 clk: MediaTek: add hifsys entry for MT7623 SoC. by developer · Mon Jul 29 22:17:48 2019 +0800
  20. 1fe5ad0 clk: mediatek: add driver for MT8516 by Fabien Parent · Sun Mar 24 16:46:36 2019 +0100
  21. 69463e5 clk: mediatek: add support for SETCLR_INV and NO_SETCLR flags by Fabien Parent · Sun Mar 24 16:46:35 2019 +0100
  22. 0225945 clk: MediaTek: bind ethsys reset controller by developer · Thu Dec 20 16:12:52 2018 +0800
  23. d1b1ffa clk: MediaTek: add clock driver for MT7623 SoC. by developer · Thu Nov 15 10:07:55 2018 +0800
  24. 2186c98 clk: MediaTek: add clock driver for MT7629 SoC. by developer · Thu Nov 15 10:07:54 2018 +0800