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git01.mediatek.com / filogic / uboot / 25a2d7c28a40c99fab8cb84aa5efc7895bed08f7 / cpu / mpc8xxx / ddr
  1. 9dbbd7b Coding style cleanup, update CHANGELOG by Wolfgang Denk · Sat Sep 13 02:23:05 2008 +0200
  2. 35ad58d Fix compiler warning in mpc8xxx ddr code by Kumar Gala · Fri Sep 05 14:40:29 2008 -0500
  3. fcf2884 FSL DDR: Add DDR2 DIMM paramter support by Kumar Gala · Tue Aug 26 15:01:32 2008 -0500
  4. 711d11b FSL DDR: Add DDR1 DIMM paramter support by Kumar Gala · Tue Aug 26 15:01:30 2008 -0500
  5. 124b082 FSL DDR: Rewrite the FSL mpc8xxx DDR controller setup code. by Kumar Gala · Tue Aug 26 15:01:29 2008 -0500