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git01.mediatek.com / filogic / uboot / 25a1686bcb8523992c58c511bf0c82b77f760257 / drivers / ddr / marvell / a38x / xor.c
  1. 6d5e3fe ddr: marvell: a38x: Sync code with Marvell mv-ddr-marvell repository by Pali Rohár · Tue Mar 02 11:17:41 2021 +0100
  2. 2b368e1 ddr: marvell: a38x: fix memory cs size function by Moti Buskila · Fri Feb 19 17:11:22 2021 +0100
  3. 4bf81db ARM: mvebu: a38x: sync ddr training code with mv_ddr-armada-18.09.02 by Chris Packham · Mon Dec 03 14:26:49 2018 +1300
  4. 915f8ee ARM: mvebu: a38x: use non-zero size for ddr scrubbing by Chris Packham · Thu May 10 13:28:31 2018 +1200
  5. 1a07d21 ARM: mvebu: a38x: sync ddr training code with upstream by Chris Packham · Thu May 10 13:28:29 2018 +1200
  6. 10e4779 SPDX: Convert all of our single license tags to Linux Kernel style by Tom Rini · Sun May 06 17:58:06 2018 -0400
  7. 5ffceb8 arm: mvebu: Add Armada 38x DDR3 training code from Marvell bin_hdr by Stefan Roese · Thu Mar 26 15:36:56 2015 +0100