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git01.mediatek.com / filogic / uboot / 24252da59b402394b9e570bd723b151b34a93b88 / include / virtex2.h
  1. 68ad797 fpga: xilinx: virtex2: Fix macro indentation by Michal Simek · Wed Jul 16 10:47:43 2014 +0200
  2. e0aca2e fpga: xilinx: virtex2: Setup NULL fpga_op without driver by Michal Simek · Wed Jul 16 10:48:08 2014 +0200
  3. 75fafac fpga: xilinx: Simplify load/dump/info function handling by Michal Simek · Thu Mar 13 13:07:57 2014 +0100
  4. b4079cf fpga: xilinx: Fix the rest of CamelCases by Michal Simek · Thu Mar 13 12:58:20 2014 +0100
  5. 25e1e2e fpga: xilinx: Avoid CamelCase for in Xilinx_desc by Michal Simek · Thu Mar 13 12:49:21 2014 +0100
  6. 9025888 fpga: virtex2: Avoid CamelCase by Michal Simek · Thu Mar 13 11:33:36 2014 +0100
  7. d79de1d Add GPL-2.0+ SPDX-License-Identifier to source files by Wolfgang Denk · Mon Jul 08 09:37:19 2013 +0200
  8. 74f9b38 fpga: constify to fix build warning by Wolfgang Denk · Sat Jul 30 13:33:49 2011 +0000
  9. cf8582c fpga: Remove relocation fixups by Peter Tyser · Mon Sep 21 11:20:32 2009 -0500
  10. a1be476 Big white-space cleanup. by Wolfgang Denk · Tue May 20 16:00:29 2008 +0200
  11. c609719 Initial revision by wdenk · Sun Nov 03 00:24:07 2002 +0000