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git01.mediatek.com / filogic / uboot / 22e9f89c63266b11906cf76b24dc943ceefddb91 / doc / README.fsl-ddr
  1. 6726631 doc: Fix some typos in different files by Thomas Weber · Sat Mar 24 22:44:01 2012 +0000
  2. bd495cf powerpc/8xxx: Add support for interactive DDR programming interface by York Sun · Fri Sep 16 13:21:35 2011 -0700
  3. 454f507 powerpc/mpc8xxx: Add DDR2 to unified DDR driver by York Sun · Fri Aug 26 11:32:43 2011 -0700
  4. a4de835 Minor Coding Style Cleanup. by Wolfgang Denk · Wed Feb 02 22:36:10 2011 +0100
  5. ba0c2eb mpc85xx: Enable unique mode registers and dynamic ODT for DDR3 by York Sun · Mon Jan 10 12:03:00 2011 +0000
  6. 0ac71ea mpc8xxx: Enable ECC on/off control in hwconfig by York Sun · Mon Jan 10 12:02:57 2011 +0000
  7. c41b744 Add memory test feature for mpc85xx POST. by York Sun · Tue Sep 28 15:20:33 2010 -0700
  8. 4260372 powerpc/8xxx: Enabled address hashing for 85xx by york · Fri Jul 02 22:25:54 2010 +0000
  9. 93799ca powerpc/8xxx: Fix bug in memctrl interleaving & bank interleaving on cs0~cs4 by york · Fri Jul 02 22:25:52 2010 +0000
  10. 6404209 powerpc/8xxx: Enabled hwconfig for memory interleaving by Kumar Gala · Wed Jul 14 10:04:21 2010 -0500
  11. b834f92 Check DDR interleaving mode by Haiying Wang · Fri Oct 03 12:37:10 2008 -0400