Gitiles
Code Review
Sign In
git01.mediatek.com
/
filogic
/
uboot
/
219e52c44cd21f75636527fc583d9fe9379792be
/
drivers
/
fpga
/
versalpl.c
dec7ea0
Restore patch series "arm: dts: am62-beagleplay: Fix Beagleplay Ethernet"
by Tom Rini
· Mon May 20 13:35:03 2024 -0600
abb9a04
Revert "Merge patch series "arm: dts: am62-beagleplay: Fix Beagleplay Ethernet""
by Tom Rini
· Sat May 18 20:20:43 2024 -0600
10d301b
fpga: Remove <common.h> and add needed includes
by Tom Rini
· Wed May 01 19:30:47 2024 -0600
a8c9436
arm64: zynqmp: Switch to amd.com emails
by Michal Simek
· Mon Jul 10 14:35:49 2023 +0200
c0806cc
fpga: xilinx: pass compatible flags to load() callback
by Oleksandr Suvorov
· Fri Jul 22 17:16:10 2022 +0300
0768aeb
xilinx: zynqmp: synchronize firmware call return payload
by Ibai Erkiaga
· Tue Aug 04 23:17:26 2020 +0100
274410a
arm64: xilinx: Print fpga error value in hex
by T Karthik Reddy
· Thu May 14 07:49:36 2020 -0600
0f2af88
common: Drop log.h from common header
by Simon Glass
· Sun May 10 11:40:05 2020 -0600
274e0b0
common: Drop net.h from common header
by Simon Glass
· Sun May 10 11:39:56 2020 -0600
6333448
common: Move ARM cache operations out of common.h
by Simon Glass
· Thu Nov 14 12:57:39 2019 -0700
142fb5b
arm64: versal: Rename versal_pm_request to xilinx_pm_request
by Michal Simek
· Fri Oct 04 15:52:43 2019 +0200
81efd2a
arm64: xilinx: Move firmware functions from platform to driver
by Michal Simek
· Fri Oct 04 15:45:29 2019 +0200
b739897
arm64: versal: fpga: Add PL bit stream load support
by Siva Durga Prasad Paladugu
· Mon Aug 05 15:54:59 2019 +0530