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git01.mediatek.com / filogic / uboot / 2138a73d59fe68a7a6af40e844711cbf6f767bd4 / drivers / serial / serial_sifive.c
  1. 0f2af88 common: Drop log.h from common header by Simon Glass · Sun May 10 11:40:05 2020 -0600
  2. d66c5f7 dm: core: Require users of devres to include the header by Simon Glass · Mon Feb 03 07:36:15 2020 -0700
  3. 024d060 riscv : serial: use rx watermark to indicate rx data is present by Sagar Shrikant Kadam · Tue Jul 09 05:23:44 2019 -0700
  4. 9ee724f serial: sifive: Change include order by Jagan Teki · Wed May 08 19:56:16 2019 +0530
  5. 574fa69 drivers: serial_sifive: Skip baudrate config if no input clock by Atish Patra · Mon Feb 25 08:15:08 2019 +0000
  6. bc922d4 drivers: serial_sifive: Fix baud rate calculation by Atish Patra · Mon Feb 25 08:15:02 2019 +0000
  7. 4b1d68f drivers: serial: Add SiFive UART driver by Anup Patel · Sat Dec 15 11:35:15 2018 +0530