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git01.mediatek.com / filogic / uboot / 1d4abb837888710fc090916220f82c7e6d2fbb02 / drivers / spi / designware_spi.c
  1. 1096ae1 treewide: convert (void *)devfdt_get_addr() to dev_read_addr_ptr() by Masahiro Yamada · Fri Jul 17 14:36:46 2020 +0900
  2. 5a9ecb2 Revert "Merge tag 'dm-pull-20jul20' of git://git.denx.de/u-boot-dm" by Tom Rini · Fri Jul 24 08:42:06 2020 -0400
  3. a3332a1 treewide: convert (void *)devfdt_get_addr() to dev_read_addr_ptr() by Masahiro Yamada · Fri Jul 17 14:36:46 2020 +0900
  4. 4dcacfc common: Drop linux/bitops.h from common header by Simon Glass · Sun May 10 11:40:13 2020 -0600
  5. 0f2af88 common: Drop log.h from common header by Simon Glass · Sun May 10 11:40:05 2020 -0600
  6. 9bc1564 dm: core: Create a new header file for 'compat' features by Simon Glass · Mon Feb 03 07:36:16 2020 -0700
  7. fa4689a dm: gpio: Allow control of GPIO uclass in SPL by Simon Glass · Fri Dec 06 21:41:35 2019 -0700
  8. d95ab40 spi: designware_spi: Disable and free clock when remove driver by Ley Foon Tan · Wed Sep 19 16:27:19 2018 +0800
  9. 70cd31b spi: designware: convert to livetree by Simon Goldschmidt · Thu May 09 22:11:57 2019 +0200
  10. 340e5b3 spi: designware: Change include order by Horatiu.Vultur@microchip.com · Mon Feb 25 10:59:54 2019 +0000
  11. f289337 DW SPI: Allow to overload the management of the external CS by Gregory CLEMENT · Tue Oct 09 14:14:07 2018 +0200
  12. fc3382d spi: designware_spi: Add reset ctrl to driver by Ley Foon Tan · Fri Sep 07 14:25:29 2018 +0800
  13. 10e4779 SPDX: Convert all of our single license tags to Linux Kernel style by Tom Rini · Sun May 06 17:58:06 2018 -0400
  14. 208be8f spi: dw: invert wait condition in dw_spi_xfer by Eugeniy Paltsev · Thu Apr 19 17:47:41 2018 +0300
  15. e0c8923 DW SPI: use 32 bit access instead of 16 and 32 bit mix by Eugeniy Paltsev · Thu Mar 22 13:50:47 2018 +0300
  16. a7b4de1 DW SPI: add option to use external gpio for chip select by Eugeniy Paltsev · Thu Mar 22 13:50:46 2018 +0300
  17. c5c6d45 DW SPI: refactor poll_transfer functions by Eugeniy Paltsev · Thu Mar 22 13:50:45 2018 +0300
  18. 31f5013 DW SPI: fix transmit only mode by Eugeniy Paltsev · Thu Mar 22 13:50:44 2018 +0300
  19. 7215ad2 DW SPI: fix tx data loss on FIFO flush by Eugeniy Paltsev · Thu Mar 22 13:50:43 2018 +0300
  20. 8b841e3 DW SPI: Get clock value from Device Tree by Eugeniy Paltsev · Thu Dec 28 15:09:03 2017 +0300
  21. ba1dea4 dm: Rename dev_addr..() functions by Simon Glass · Wed May 17 17:18:05 2017 -0600
  22. dd79d6e dm: core: Replace of_offset with accessor by Simon Glass · Tue Jan 17 16:52:55 2017 -0700
  23. fac4491 spi: designware_spi: Use GENMASK by Jagan Teki · Fri Oct 23 01:01:36 2015 +0530
  24. b17746d spi: designware_spi: Use BIT macro by Jagan Teki · Fri Oct 23 01:36:23 2015 +0530
  25. 0971778 dm: Use dev_get_addr() where possible by Simon Glass · Tue Aug 11 08:33:29 2015 -0600
  26. 83cfd37 spi: designware_spi: revisit FIFO size detection again by Axel Lin · Thu Feb 26 10:45:22 2015 +0800
  27. 31a4d8d dm: spi: Move the per-child data size to the uclass by Simon Glass · Sun Jan 25 08:27:07 2015 -0700
  28. 67e767d dt: socfpga: Rename snps, dw-spi-mmio to snps, dw-apb-ssi by Marek Vasut · Wed Dec 31 20:14:55 2014 +0100
  29. 3895c02 spi: designware_spi: Fix detecting FIFO depth by Axel Lin · Tue Jan 06 08:08:25 2015 +0800
  30. 571e2a4 spi: designware_spi: Some fixes / changes by Stefan Roese · Sun Nov 16 12:47:01 2014 +0100
  31. d987ea6 spi: Add designware master SPI DM driver used on SoCFPGA by Stefan Roese · Fri Nov 07 13:50:31 2014 +0100