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git01.mediatek.com / filogic / uboot / 1cd3ec994e8cdc3e9fcc564aa671f58d0fdc7947 / drivers / clk / qcom / clock-sdm845.c
  1. dec7ea0 Restore patch series "arm: dts: am62-beagleplay: Fix Beagleplay Ethernet" by Tom Rini · Mon May 20 13:35:03 2024 -0600
  2. abb9a04 Revert "Merge patch series "arm: dts: am62-beagleplay: Fix Beagleplay Ethernet"" by Tom Rini · Sat May 18 20:20:43 2024 -0600
  3. 32fa621 clk: Remove <common.h> and add needed includes by Tom Rini · Wed May 01 19:30:36 2024 -0600
  4. 9726810 clk/qcom: sdm845: enable SDCC2 core clock by Caleb Connolly · Tue Apr 09 20:03:04 2024 +0200
  5. f216085 clk/qcom: sdm845: add USB clocks by Caleb Connolly · Wed Apr 03 14:07:42 2024 +0200
  6. a31b068 clk/qcom: sdm845: add gdscs by Caleb Connolly · Wed Apr 03 14:07:41 2024 +0200
  7. cbdad44 clk/qcom: use offsets for RCG registers by Caleb Connolly · Wed Apr 03 14:07:40 2024 +0200
  8. e07ce56 mach-snapdragon: disable power-domains for pre-reloc drivers by Caleb Connolly · Wed Apr 03 14:07:39 2024 +0200
  9. 397c84f clk/qcom: fix rcg divider value by Caleb Connolly · Tue Nov 07 12:41:05 2023 +0000
  10. fbacc67 clk/qcom: add mnd_width to clk_rcg_set_rate_mnd() by Caleb Connolly · Tue Nov 07 12:41:04 2023 +0000
  11. 10a0abb clk/qcom: use function pointers for enable and set_rate by Caleb Connolly · Tue Nov 07 12:41:03 2023 +0000
  12. 7a63294 clk/qcom: sdm845: add register map for simple gate clocks by Caleb Connolly · Tue Nov 07 12:41:02 2023 +0000
  13. 6c0b844 clk/qcom: handle resets and clocks in one device by Konrad Dybcio · Tue Nov 07 12:41:01 2023 +0000
  14. 878b26a clk/qcom: move from mach-snapdragon by Caleb Connolly · Tue Nov 07 12:40:59 2023 +0000[Renamed (98%) from arch/arm/mach-snapdragon/clock-sdm845.c]
  15. 1d1ca6e clocks: qcom: Add clock enable callback support by Sumit Garg · Thu Aug 04 19:57:14 2022 +0530
  16. 8bdffc3 clocks: sdm845: Import qcom,gcc-sdm845.h by Sumit Garg · Tue Jul 12 12:42:06 2022 +0530
  17. 038f2b9 clocks: qcom: add clocks for SDM845 debug uart by Dzmitry Sankouski · Sun Oct 17 13:44:30 2021 +0300