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git01.mediatek.com / filogic / uboot / 1cd06009d64fb4b3adcf117c12c4e7bc13afd7f4 / drivers / clk / sunxi / clk_h6.c
  1. d73b8a5 clk: sunxi: h6: Add XHCI clocks by Samuel Holland · Sun Feb 07 23:57:20 2021 -0600
  2. 8a2b47f dm: treewide: Rename auto_alloc_size members to be shorter by Simon Glass · Thu Dec 03 16:55:17 2020 -0700
  3. 4dcacfc common: Drop linux/bitops.h from common header by Simon Glass · Sun May 10 11:40:13 2020 -0600
  4. 60e6efd sunxi: clocks: Add H6 USB clock gates and resets by Andre Przywara · Sun Jun 23 15:09:48 2019 +0100
  5. 836631b clk: sunxi: Implement EMAC, GMAC clocks, resets by Jagan Teki · Thu Feb 28 00:26:57 2019 +0530
  6. bc12313 clk: sunxi: Implement SPI clocks, resets by Jagan Teki · Wed Feb 27 20:02:06 2019 +0530
  7. ddf33c1 sunxi: clk: add MMC gates/resets by Andre Przywara · Tue Jan 29 15:54:09 2019 +0000
  8. 5bc16d2 clk: sunxi: Add Allwinner H6 CLK driver by Jagan Teki · Mon Dec 31 15:35:01 2018 +0530