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git01.mediatek.com / filogic / uboot / 1b7028d44fc3eaabf279e70a13343457851586f9 / arch / x86 / include / asm / mrccache.h
  1. 6e1b956 x86: Don't export mrccache_update() by Simon Glass · Fri Dec 06 21:42:09 2019 -0700
  2. b5b0aff x86: Add mrccache support for a 'variable' cache by Simon Glass · Fri Dec 06 21:42:08 2019 -0700
  3. 91efff5 x86: Update mrccache to support multiple caches by Simon Glass · Fri Dec 06 21:42:07 2019 -0700
  4. 91c0736 x86: Reduce mrccache record alignment size by Simon Glass · Fri Dec 06 21:42:01 2019 -0700
  5. 48fd856 x86: Support saving MRC data from SPL by Simon Glass · Thu Apr 25 21:58:57 2019 -0600
  6. 10e4779 SPDX: Convert all of our single license tags to Linux Kernel style by Tom Rini · Sun May 06 17:58:06 2018 -0400
  7. 2845ead x86: Use struct mrc_region to describe a mrc region by Bin Meng · Sun Oct 11 21:37:41 2015 -0700
  8. 1f81b59 x86: Add more common routines to manipulate mrc cache by Bin Meng · Sun Oct 11 21:37:39 2015 -0700
  9. 8575ab1 x86: Add various minor tidy-ups in mrccache codes by Bin Meng · Sun Oct 11 21:37:38 2015 -0700
  10. d61a7b4 x86: Do sanity test on the cache record in mrccache_update() by Bin Meng · Sun Oct 11 21:37:37 2015 -0700
  11. 21666cf x86: Move mrccache.[c|h] to a common place by Bin Meng · Sun Oct 11 21:37:36 2015 -0700[Renamed from arch/x86/include/asm/arch-ivybridge/mrccache.h]
  12. 35f15f6 dm: x86: spi: Convert ICH SPI driver to driver model by Simon Glass · Thu Mar 26 09:29:26 2015 -0600
  13. 428dfa4 x86: Implement a cache for Memory Reference Code parameters by Simon Glass · Mon Jan 19 22:16:14 2015 -0700