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git01.mediatek.com / filogic / uboot / 1a3732cb2575df75dcf83479a7d69266eff9745a / drivers / ddr
  1. 4dcacfc common: Drop linux/bitops.h from common header by Simon Glass · Sun May 10 11:40:13 2020 -0600
  2. dbd7954 common: Drop linux/delay.h from common header by Simon Glass · Sun May 10 11:40:11 2020 -0600
  3. c06c1be common: Drop linux/bug.h from common header by Simon Glass · Sun May 10 11:40:08 2020 -0600
  4. 0f2af88 common: Drop log.h from common header by Simon Glass · Sun May 10 11:40:05 2020 -0600
  5. ed38aef command: Remove the cmd_tbl_t typedef by Simon Glass · Sun May 10 11:40:03 2020 -0600
  6. 9758973 common: Drop init.h from common header by Simon Glass · Sun May 10 11:40:02 2020 -0600
  7. 274e0b0 common: Drop net.h from common header by Simon Glass · Sun May 10 11:39:56 2020 -0600
  8. 08a4abe arm: mvebu: drivers/ddr: remove redundant assignment by Heinrich Schuchardt · Sat Feb 15 21:58:31 2020 +0100
  9. e422adc ddr: marvell: a38x: Allow boards to specify CK_DELAY parameter by Chris Packham · Thu Jan 30 12:50:44 2020 +1300
  10. 4d5cda6 Revert "mpc85xx: ddr: Always start DDR RAM in Self Refresh mode" by Biwen Li · Thu Apr 09 20:44:48 2020 +0800
  11. b7b1838 Merge tag 'dm-pull-6feb20' of https://gitlab.denx.de/u-boot/custodians/u-boot-dm by Tom Rini · Tue Feb 11 10:58:41 2020 -0500
  12. 9bc1564 dm: core: Create a new header file for 'compat' features by Simon Glass · Mon Feb 03 07:36:16 2020 -0700
  13. 6bccacf ddr: altera: Add DDR2 support to Gen5 driver by Marek Vasut · Fri Oct 18 00:22:31 2019 +0200
  14. 2288efd arm: mvebu: fix A38x breakage from commit bb872dd930cc by Joel Johnson · Sun Jan 26 09:48:58 2020 -0700
  15. 24a1d13 ddr: marvell: a38x: allow board specific clock out setup by Baruch Siach · Mon Jan 20 14:20:06 2020 +0200
  16. f11478f common: Move hang() to the same header as panic() by Simon Glass · Sat Dec 28 10:45:07 2019 -0700
  17. 8e16b1e common: Move RAM-sizing functions to init.h by Simon Glass · Sat Dec 28 10:45:05 2019 -0700
  18. 85f1378 common: Move the image globals into image.h by Simon Glass · Sat Dec 28 10:45:03 2019 -0700
  19. 892265d image: Rename load_addr, save_addr, save_size by Simon Glass · Sat Dec 28 10:45:02 2019 -0700
  20. a72088d Merge tag 'u-boot-imx-20200108' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx by Tom Rini · Wed Jan 08 15:24:50 2020 -0500
  21. 0dbdaf3 Merge branch 'master' of git://git.denx.de/u-boot-socfpga by Tom Rini · Wed Jan 08 15:23:49 2020 -0500
  22. 49dbcee ddr: imx8m: Add DRAM PLL to generate 1000Mhz output by Peng Fan · Mon Dec 30 09:58:52 2019 +0800
  23. fefee55 Merge tag 'u-boot-imx-20200107' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx by Tom Rini · Tue Jan 07 08:45:43 2020 -0500
  24. 7ead421 ddr: socfpga: Enable ARM64 Non-Secure SDRAM ECC Access by Thor Thayer · Fri Dec 06 13:47:32 2019 -0600
  25. 6e762d8 arm: socfpga: stratix10: Enable SMMU access by Thor Thayer · Fri Dec 06 13:47:31 2019 -0600
  26. 4ddb909 ddr: altera: agilex: Add SDRAM driver for Agilex by Ley Foon Tan · Wed Nov 27 15:55:27 2019 +0800
  27. 25572cf ddr: altera: Restructure Stratix 10 SDRAM driver by Ley Foon Tan · Wed Nov 27 15:55:26 2019 +0800
  28. 0b1680e arm: socfpga: Move Stratix10 and Agilex system manager common code by Ley Foon Tan · Wed Nov 27 15:55:18 2019 +0800
  29. f1c4bd5 arm: socfpga: Move firewall code to firewall file by Ley Foon Tan · Wed Nov 27 15:55:15 2019 +0800
  30. 3d3a860 arm: socfpga: Convert system manager from struct to defines by Ley Foon Tan · Fri Nov 08 10:38:20 2019 +0800
  31. 2a9b1f5 ddr: imx8m: Return error values from LPDDR4 training by Frieder Schrempf · Wed Dec 11 10:01:19 2019 +0000
  32. 1a6b0f1 Merge branch 'next' by Tom Rini · Mon Jan 06 17:07:49 2020 -0500
  33. 9f7ee33 imx8m: ddr_init: Move ddr_init() messages to debug level by Fabio Estevam · Wed Dec 11 17:37:09 2019 -0300
  34. f379b54 mpc85xx: ddr: Always start DDR RAM in Self Refresh mode by Joakim Tjernlund · Wed Nov 27 19:35:10 2019 +0100
  35. 1d91ba7 common: Move some cache and MMU functions out of common.h by Simon Glass · Thu Nov 14 12:57:37 2019 -0700
  36. e874433 ddr: socfpga: gen5: constify altera_gen5_sdram_ops by Simon Goldschmidt · Wed Oct 23 22:19:37 2019 +0200
  37. 828d41b ddr: imx8m: Fix the ddr init hang on imx8mq by Jacky Bai · Thu Aug 08 09:59:11 2019 +0000
  38. d62ddc1 driver: ddr: Refine the ddr init driver on imx8m by Jacky Bai · Thu Aug 08 09:59:08 2019 +0000
  39. 69b8eb0 imx8mq: Update the ddrc QoS setting for B1 chip by Bai Ping · Thu Aug 08 09:59:05 2019 +0000
  40. f19c31c ddr: imx8m: Fix ddr4 driver build issue by Ye Li · Thu Aug 08 09:59:02 2019 +0000
  41. 4f992e5 ddr: imx8m: fix ddr firmware location when enable SPL OF by Peng Fan · Tue Aug 27 06:24:47 2019 +0000
  42. 375038f ddr, fsl: add DM_I2C support by Heiko Schocher · Mon Aug 26 17:28:34 2019 +0200
  43. 37c2c5e boards: lx2160a: Add support of I2C driver model by Chuanhua Han · Wed Jul 10 21:00:20 2019 +0800
  44. db22961 env: Move env_get_f() to env.h by Simon Glass · Thu Aug 01 09:46:42 2019 -0600
  45. 2be4a3e dm: ddr: socfpga: fix gen5 ddr driver to not use bss by Simon Goldschmidt · Thu Jul 11 21:18:12 2019 +0200
  46. 805cac1 mpc83xx: Get rid of CONFIG_SYS_DDR_SDRAM_BASE by Mario Six · Mon Jan 21 09:18:16 2019 +0100
  47. 3fdf436 arm: socfpga: Move Stratix 10 SDRAM driver to DM by Ley Foon Tan · Mon May 06 09:56:01 2019 +0800
  48. 17b9ba6 ddr: altera: Compile ALTERA SDRAM in SPL only by Ley Foon Tan · Mon May 06 09:55:59 2019 +0800
  49. ca09d4c ddr: imx8m: hide i.MX8M DDR options from device driver entry by Peng Fan · Mon Apr 22 10:41:28 2019 +0000
  50. 9799a67 ddr: altera: Stratix10: Add ECC memory scrubbing by Ley Foon Tan · Fri Mar 22 01:24:05 2019 +0800
  51. 4bbed7b ddr: altera: Stratix10: Add multi-banks DRAM size check by Ley Foon Tan · Fri Mar 22 01:24:01 2019 +0800
  52. a9245d1 ddr: altera: stratix10: Move SDRAM size check to SDRAM driver by Ley Foon Tan · Fri Mar 22 01:24:00 2019 +0800
  53. 24910c3 arm: socfpga: move gen5 SDR driver to DM by Simon Goldschmidt · Tue Apr 16 22:04:39 2019 +0200
  54. a8f845e arm: mvebu: Add Marvell's integrated CPUs by Chris Packham · Thu Apr 11 22:22:50 2019 +1200
  55. 580b2b4 mv_ddr: ddr3: only use active chip-selects when tuning ODT by Chris Packham · Fri Mar 01 10:11:14 2019 +1300
  56. ac8bfb1 mv_ddr: ddr3: fix tRAS timimg parameter by Chris Packham · Fri Mar 01 10:11:13 2019 +1300
  57. 0f36715 ddr: socfpga: Clean up ddr_setup() by Marek Vasut · Sat Mar 09 21:58:09 2019 +0100
  58. 569fe4a ddr: socfpga: Clean up EMIF reset by Marek Vasut · Sat Mar 09 21:57:58 2019 +0100
  59. a9c0470 ddr: socfpga: Fix EMIF clear timeout by Marek Vasut · Fri Mar 08 19:11:55 2019 +0100
  60. 6b44050 ddr: socfpga: Fix newline in debug print on A10 by Marek Vasut · Wed Mar 06 17:18:22 2019 +0100
  61. e2bc6b1 ddr: socfpga: Fix IO in Arria10 DDR driver by Marek Vasut · Tue Mar 05 18:37:02 2019 +0100
  62. ba2414f configs: fsl: move DDR specific defines to Kconfig by Rajesh Bhagat · Fri Feb 01 05:22:01 2019 +0000
  63. 419ffc9 drivers/ddr/fsl: Update fsl_ddr_board_options as weak function by Priyanka Jain · Mon Oct 29 09:37:36 2018 +0000
  64. 692f943 drivers: ddr: introduce DDR driver for i.MX8M by Peng Fan · Tue Nov 20 10:19:57 2018 +0000
  65. 3f829b8 Merge tag 'fsl-qoriq-for-v2019.01-rc2' of git://git.denx.de/u-boot-fsl-qoriq by Tom Rini · Mon Dec 10 17:12:52 2018 -0500
  66. 2e0d2ba ARM: mvebu: restore license information in mv_ddr_plat.{c,h} by Chris Packham · Mon Dec 10 10:41:15 2018 +1300
  67. 4bf81db ARM: mvebu: a38x: sync ddr training code with mv_ddr-armada-18.09.02 by Chris Packham · Mon Dec 03 14:26:49 2018 +1300
  68. ef76b2e armv8: lx2160a: Add LX2160A SoC Support by Priyanka Jain · Mon Oct 29 09:17:09 2018 +0000
  69. 897dbd7 socfpga: stratix10: fix sdram_calculate_size by Dalon Westergreen · Tue Sep 11 10:06:14 2018 -0700
  70. 1a491e8 drivers/ddr/fsl: fix '__hwconfig without a buffer' messages by Jeremy Gebben · Fri Jul 20 16:00:36 2018 -0600
  71. 3693897 ddr: altera: Add ECC DRAM scrubbing support for Arria10 by Marek Vasut · Mon May 28 17:22:47 2018 +0200
  72. 023b31b ddr: altera: Drop custom dram_bank_mmu_setup() on Arria10 by Marek Vasut · Tue May 29 18:04:15 2018 +0200
  73. f9c7f79 ddr: altera: stratix10: Add DDR support for Stratix10 SoC by Ley Foon Tan · Thu May 24 00:17:30 2018 +0800
  74. 4606fc7 SPDX: Fixup SPDX tags in a few new files by Tom Rini · Sun May 20 09:47:45 2018 -0400
  75. 4d447a5 configs: Add DDR Kconfig support for Arria 10 by Tien Fong Chee · Tue Dec 05 15:58:03 2017 +0800
  76. 402735b ARM: socfpga: Add DDR driver for Arria 10 by Tien Fong Chee · Tue Dec 05 15:58:02 2017 +0800
  77. 38fad17 ARM: socfpga: Rename the gen5 sdram driver to more specific name by Tien Fong Chee · Tue Dec 05 15:58:00 2017 +0800
  78. 0359c49 ARM: mvebu: a38x: Add missing SPDX license identfier by Chris Packham · Tue May 15 13:31:11 2018 +1200
  79. 915f8ee ARM: mvebu: a38x: use non-zero size for ddr scrubbing by Chris Packham · Thu May 10 13:28:31 2018 +1200
  80. 3a09e13 ARM: mvebu: a38x: restore support for setting timing by Chris Packham · Thu May 10 13:28:30 2018 +1200
  81. 1a07d21 ARM: mvebu: a38x: sync ddr training code with upstream by Chris Packham · Thu May 10 13:28:29 2018 +1200
  82. 5ec8ff7 ARM: mvebu: a38x: remove some unused code by Chris Packham · Thu May 10 13:28:28 2018 +1200
  83. cf43391 ARM: mvebu: a38x: move sys_env_device_rev_get by Chris Packham · Thu May 10 13:28:27 2018 +1200
  84. d16a695 ARM: mvebu: a38x: move definition of PEX_CFG_DIRECT_ACCESS by Chris Packham · Thu May 10 13:28:26 2018 +1200
  85. 10e4779 SPDX: Convert all of our single license tags to Linux Kernel style by Tom Rini · Sun May 06 17:58:06 2018 -0400
  86. bdfb5c4 Remove unnecessary instances of DECLARE_GLOBAL_DATA_PTR by Tom Rini · Wed Apr 18 13:50:47 2018 -0400
  87. d3e6816 Revert "drivers/ddr/fsl: Dual-license DDR driver" by Tom Rini · Wed Feb 14 21:34:05 2018 -0500
  88. 6d49eda drivers/ddr/fsl: Dual-license DDR driver by York Sun · Wed Feb 07 11:47:22 2018 -0800
  89. 74588bb drivers/ddr/fsl: Cleanup unused variable by York Sun · Mon Jan 29 09:44:38 2018 -0800
  90. 194c2f4 drivers/ddr/fsl: Modify binding registers to save time on data init by York Sun · Mon Jan 29 09:44:37 2018 -0800
  91. bc2f32a drivers/ddr/fsl: Add calculation of register control words by York Sun · Mon Jan 29 10:24:08 2018 -0800
  92. 6db4fdd drivers/ddr/fsl: Add 3DS RDIMM support by York Sun · Mon Jan 29 09:44:35 2018 -0800
  93. 2a4859e drivers/ddr/fsl: Fix workaround for A009803 by York Sun · Mon Jan 29 09:44:34 2018 -0800
  94. d9f7fa0 drivers/ddr/fsl: Fix DDR4 RDIMM support by York Sun · Mon Jan 29 09:44:33 2018 -0800
  95. c00a369 Merge git://git.denx.de/u-boot-socfpga by Tom Rini · Sat Jan 27 14:48:41 2018 -0500
  96. 60649bb Merge git://git.denx.de/u-boot-spi by Tom Rini · Fri Jan 26 07:46:34 2018 -0500
  97. a4af914 ddr: altera: silence PHY calibration unless in debug mode by Goldschmidt Simon · Thu Jan 25 06:04:44 2018 +0000
  98. 918de03 wait_bit: use wait_for_bit_le32 and remove wait_for_bit by Álvaro Fernández Rojas · Tue Jan 23 17:14:55 2018 +0100
  99. 661bc24 ddr: fsl: set cdr1 first in case 0.9v VDD is enabled for some SoCs by Rajesh Bhagat · Wed Jan 17 16:13:06 2018 +0530
  100. 5450f0c ddr: marvell: update ddr controller init and freq by Chris Packham · Thu Jan 18 17:16:10 2018 +1300