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git01.mediatek.com / filogic / uboot / 194d7578aa6b12264f0aab48b12af21577a84bbd / arch / x86 / cpu / ivybridge
  1. 194d757 x86: ivybridge: Set up EHCI USB by Simon Glass · Fri Nov 14 18:18:40 2014 -0700
  2. cd0adb3 x86: ivybridge: Add SATA init by Simon Glass · Fri Nov 14 18:18:38 2014 -0700
  3. 06409c9 x86: ivybridge: Add additional LPC init by Simon Glass · Fri Nov 14 18:18:35 2014 -0700
  4. f307708 x86: ivybridge: Add PCH init by Simon Glass · Fri Nov 14 18:18:34 2014 -0700
  5. 17f1c40 x86: ivybridge: Add support for BD82x6x PCH by Simon Glass · Fri Nov 14 18:18:32 2014 -0700
  6. 268eefd x86: ivybridge: Implement SDRAM init by Simon Glass · Wed Nov 12 22:42:28 2014 -0700
  7. d22f5c9 x86: ivybridge: Add LAPIC support by Simon Glass · Wed Nov 12 22:42:27 2014 -0700
  8. 30580fc x86: ivybridge: Add early init for PCH devices by Simon Glass · Wed Nov 12 22:42:23 2014 -0700
  9. f79d538 x86: ivybridge: Perform Intel microcode update on boot by Simon Glass · Wed Nov 12 22:42:21 2014 -0700
  10. 367077a x86: ivybridge: Check BIST value on boot by Simon Glass · Wed Nov 12 22:42:20 2014 -0700
  11. f226c41 x86: ivybridge: Perform initial CPU setup by Simon Glass · Wed Nov 12 22:42:19 2014 -0700
  12. dcfac35 x86: ivybridge: Add early LPC init so that serial works by Simon Glass · Wed Nov 12 22:42:15 2014 -0700
  13. 3274ae0 x86: ivybridge: Enable PCI in early init by Simon Glass · Wed Nov 12 22:42:13 2014 -0700
  14. 98f139b x86: chromebook_link: Implement CAR support (cache as RAM) by Simon Glass · Wed Nov 12 22:42:10 2014 -0700
  15. 0b36ecd x86: Add chromebook_link board by Simon Glass · Wed Nov 12 22:42:07 2014 -0700