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git01.mediatek.com / filogic / uboot / 186d1975e2a890b6270eae63ffc150d4768df358 / drivers / clk / rockchip / clk_rk3308.c
  1. 2d7b0d0 clk: rockchip: rk3308: Support reading UART rate and clock registers by Massimo Pegorer · Thu Aug 03 13:08:12 2023 +0200
  2. 00a8fa3 clk: rockchip: rk3308: Fix ordering between masking and shifting by Massimo Pegorer · Thu Aug 03 13:08:11 2023 +0200
  3. f179826 clk: rockchip: correct trivial typo in debug message by Eugen Hristev · Tue Apr 11 10:17:56 2023 +0300
  4. 3580f6d treewide: Simply conditions with the new OF_REAL by Simon Glass · Sat Aug 07 07:24:03 2021 -0600
  5. 08d531c clk: Allow force setting clock defaults before relocation by Sean Anderson · Fri Jun 11 00:16:07 2021 -0400
  6. 3ba929a common: Drop asm/global_data.h from common header by Simon Glass · Fri Oct 30 21:38:53 2020 -0600
  7. 9558862 dm: Use access methods for dev/uclass private data by Simon Glass · Tue Dec 22 19:30:28 2020 -0700
  8. aad29ae dm: treewide: Rename ofdata_to_platdata() to of_to_plat() by Simon Glass · Thu Dec 03 16:55:21 2020 -0700
  9. 8a2b47f dm: treewide: Rename auto_alloc_size members to be shorter by Simon Glass · Thu Dec 03 16:55:17 2020 -0700
  10. 4dcacfc common: Drop linux/bitops.h from common header by Simon Glass · Sun May 10 11:40:13 2020 -0600
  11. 0f2af88 common: Drop log.h from common header by Simon Glass · Sun May 10 11:40:05 2020 -0600
  12. 9bc1564 dm: core: Create a new header file for 'compat' features by Simon Glass · Mon Feb 03 07:36:16 2020 -0700
  13. afa7160 rockchip: clk: Add clk driver for rk3308 by Finley Xiao · Thu Nov 14 11:21:13 2019 +0800