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git01.mediatek.com / filogic / uboot / 1568e43417a41ea7b5b4aa69d4773d7ab31b4551 / board / altera / socfpga / socfpga_cyclone5.c
  1. d515794 arm: socfpga: Move cache_enable to CPU code by Marek Vasut · Sun Sep 21 13:57:40 2014 +0200
  2. 9618401 arm: socfpga: cache: Enable D-Cache by Marek Vasut · Mon Sep 15 01:29:08 2014 +0200
  3. a6b59a1 arm: socfpga: board: Align checkboard() output by Marek Vasut · Mon Sep 08 14:08:45 2014 +0200
  4. 26ea1d9 arm: socfpga: board: Correctly set ATAG position by Pavel Machek · Mon Sep 08 14:08:45 2014 +0200
  5. ce340e9 socfpga: initialize designware ethernet by Pavel Machek · Mon Jul 14 14:14:17 2014 +0200
  6. bff262c socfpga: Relocate arch common functions away from board by Chin Liang See · Tue Jun 10 02:23:45 2014 -0500
  7. 81a689e Move #ifdef(CONFIG_DISPLAY_CPUINFO) from caller to callee by Masahiro Yamada · Thu Feb 13 18:30:26 2014 +0900
  8. 315c12a Merge branch 'u-boot/master' into u-boot-arm/master by Albert ARIBAUD · Thu Jul 25 17:57:46 2013 +0200
  9. e24178a socfpga: Move board/socfpga_cyclone5 to board/socfpga by Dinh Nguyen · Tue Jul 02 17:00:18 2013 -0500[Renamed from board/altera/socfpga_cyclone5/socfpga_cyclone5.c]
  10. ad51f7c ARM: Add Altera SOCFPGA Cyclone5 by Dinh Nguyen · Thu Oct 04 06:46:02 2012 +0000