Gitiles
Code Review Sign In
git01.mediatek.com / filogic / uboot / 150005b0c6d898b12ac59e5898944c54ecb6f249 / drivers / ddr / altera / sequencer.h
  1. 324d3f7 ddr: altera: sequencer: Zap SEQ_T(INIT|RESET)_CNTR._VAL by Marek Vasut · 9 years ago
  2. 32d813e ddr: altera: sequencer: Zap VFIFO_SIZE by Marek Vasut · 9 years ago
  3. 2dfc76b ddr: altera: sequencer: Pluck out RW_MGR_* macros from code by Marek Vasut · 9 years ago
  4. 42ed1f2 ddr: altera: sequencer: Zap bogus redefinition of RW_MGR_MEM_NUMBER_OF_RANKS by Marek Vasut · 9 years ago
  5. eb98b38 ddr: altera: sequencer: Zap unused params and macros by Marek Vasut · 9 years ago
  6. 0f0840d ddr: altera: Clean up mem_config() by Marek Vasut · 9 years ago
  7. cd5d38e ddr: altera: Stop using SDR_CTRLGRP_ADDRESS directly by Marek Vasut · 9 years ago
  8. 33acf0f ddr: altera: Wrap SOCFPGA_SDR_ADDRESS into SDR_PHYGRP.*ADDRESS by Marek Vasut · 9 years ago
  9. a334010 ddr: altera: Pluck out remaining sdr_get_addr() calls by Marek Vasut · 9 years ago
  10. 135cc7f driver/ddr/altera: Add the sdram calibration portion by Dinh Nguyen · 9 years ago