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git01.mediatek.com / filogic / uboot / 13e21b14825dd81c03656bcb133b4299c3f74e72 / include / asm-ppc / fsl_ddr_sdram.h
  1. 4be87b2 fsl-ddr: add the DDR3 SPD infrastructure by Dave Liu · 16 years ago
  2. 30cb145 32bit BUg fix for DDR2 on 8572 by Poonam_Aggrwal-b10812 · 16 years ago
  3. 2aad0ae fsl-ddr: make the self refresh idle threshold configurable by Dave Liu · 16 years ago
  4. 4758d53 fsl-ddr: clean up the ddr code for DDR3 controller by Dave Liu · 16 years ago
  5. 272b596 Make DDR interleaving mode work correctly by Haiying Wang · 16 years ago
  6. 124b082 FSL DDR: Rewrite the FSL mpc8xxx DDR controller setup code. by Kumar Gala · 16 years ago