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git01.mediatek.com / filogic / uboot / 10e4779db8ae6c2784392fa7a1f690645918662d / arch / powerpc / cpu / mpc85xx / release.S
  1. 10e4779 SPDX: Convert all of our single license tags to Linux Kernel style by Tom Rini · Sun May 06 17:58:06 2018 -0400
  2. 548b8ba powerpc: mpc85xx: Implement CPU erratum A-007907 for secondary cores by York Sun · Tue Oct 17 08:00:21 2017 -0700
  3. ffdb488 remove unnecessary version.h includes by Rob Herring · Tue Mar 17 15:28:55 2015 -0500
  4. 5700772 PPC: 85xx: Remove IVOR reset by Alexander Graf · Fri Apr 11 17:09:42 2014 +0200
  5. 227f0a5 Remove obsolete _LINUX_CONFIG_H macro by Masahiro Yamada · Mon Jan 06 15:39:48 2014 +0900
  6. cca41c5 powerpc/mpc85xx: Workaround for A-005812 by York Sun · Tue Jun 25 11:37:49 2013 -0700
  7. d79de1d Add GPL-2.0+ SPDX-License-Identifier to source files by Wolfgang Denk · Mon Jul 08 09:37:19 2013 +0200
  8. aa150bb powerpc/chassis2: Change core numbering scheme by York Sun · Mon Mar 25 07:40:07 2013 +0000
  9. 14c3049 powerpc/mpc85xx: Fix PIR parsing for chassis2 by York Sun · Mon Mar 25 07:33:27 2013 +0000
  10. eab55c0 powerpc/mpc85xx: Add definitions for HDBCR registers by Andy Fleming · Mon Mar 25 07:33:10 2013 +0000
  11. 79dc544 powerpc: Extract EPAPR_MAGIC constants into processor.h by Stefan Roese · Thu Aug 23 09:25:37 2012 +0200
  12. f066a04 powerpc/mpc85xx: Temporary fix for spin table backward compatibility by York Sun · Sun Oct 28 08:12:54 2012 +0000
  13. 2394a0f powerpc/mpc85xx: Rewrite spin table to comply with ePAPR v1.1 by York Sun · Mon Oct 08 07:44:30 2012 +0000
  14. 31a0c8c powerpc/mpc85xx: Remove R6 from spin table by York Sun · Mon Oct 08 07:44:29 2012 +0000
  15. c3d87b1 powerpc/mpc85xx: Enable L2 at the beginning of U-boot for E6500 by York Sun · Mon Oct 08 07:44:08 2012 +0000
  16. e6c2819 powerpc/mpc85xx: fix Unicode characters in release.S by Timur Tabi · Fri Oct 05 09:48:50 2012 +0000
  17. 2adf2ce powerpc/mpc8xxx: fix core id for multicore booting by York Sun · Fri Aug 17 08:20:26 2012 +0000
  18. 8080696 powerpc/fsl-corenet: work around erratum A004510 by Scott Wood · Tue Aug 14 10:14:53 2012 +0000
  19. 5315553 powerpc/mpc85xx: Make NMG_CPU_A011 workaround conditional by York Sun · Wed Aug 08 18:04:53 2012 +0000
  20. 8d131c4 powerpc/mpc85xx: Fix Handling the lack of L2 cache on P2040/P2040E by York Sun · Mon May 07 07:39:53 2012 +0000
  21. 9ed8811 powerpc/mpc85xx: Workaround for erratum CPU_A011 by York Sun · Mon May 07 07:26:47 2012 +0000
  22. d755c83 powerpc/P4080: Check SVR for CPU22 workaround by York Sun · Mon May 07 07:26:45 2012 +0000
  23. 945e59a powerpc/85xx: Add workaround for erratum CPU-A003999 by Kumar Gala · Tue Nov 22 06:51:15 2011 -0600
  24. e08c6d8 powerpc/85xx: Handle the lack of L2 cache on P2040/P2040E by Kumar Gala · Thu Jul 21 00:20:21 2011 -0500
  25. 0191e47 Replace CONFIG_SYS_GBL_DATA_SIZE by auto-generated value by Wolfgang Denk · Tue Oct 26 14:34:52 2010 +0200
  26. 6b245b9 powerpc/p4080: Add workaround for erratum CPU22 by Kumar Gala · Wed May 05 22:35:27 2010 -0500
  27. 88fbf93 Move arch/ppc to arch/powerpc by Stefan Roese · Thu Apr 15 16:07:28 2010 +0200[Renamed from arch/ppc/cpu/mpc85xx/release.S]
  28. 29514c7 ppc: Move cpu/$CPU to arch/ppc/cpu/$CPU by Peter Tyser · Mon Apr 12 22:28:09 2010 -0500[Renamed from cpu/mpc85xx/release.S]
  29. 8709aed 85xx: Set HID1[mbdd] on e500v2 rev5.0 or greater by Sandeep Gopalpet · Fri Mar 12 10:45:02 2010 +0530
  30. 5530cb8 85xx: Add defines for BUCSR bits to make code more readable by Kumar Gala · Mon Mar 29 13:50:31 2010 -0500
  31. 48bd5f0 85xx: Fix enabling of L1 cache parity on secondary cores by Kumar Gala · Fri Mar 26 15:14:43 2010 -0500
  32. 4756ffa ppc/85xx: Map boot page guarded for MP boot by Kumar Gala · Tue Nov 17 20:21:20 2009 -0600
  33. 8d2817c 85xx: Add support for e500mc cache stashing by Kumar Gala · Thu Mar 19 02:53:01 2009 -0500
  34. b8bb411 ppc/85xx: Fix misc L2 cache enabling bug by Dave Liu · Sat Oct 31 07:59:55 2009 +0800
  35. 7feaacb 85xx: MP Boot Page Translation update by Peter Tyser · Fri Oct 23 15:55:47 2009 -0500
  36. b6a4090 ppc/85xx: Fix enabling of L2 cache by Kumar Gala · Tue Sep 22 15:45:44 2009 -0500
  37. c24a905 85xx: Add support for setting IVORs to fixed offset defaults by Kumar Gala · Fri Aug 14 13:37:54 2009 -0500
  38. 4baef82 8xxx: Removed CONFIG_NUM_CPUS from 85xx/86xx by Poonam Aggrwal · Fri Jul 31 12:08:14 2009 +0530
  39. e56f2c5 85xx: Add support for additional e500mc features by Kumar Gala · Thu Mar 19 09:16:10 2009 -0500
  40. f474551 Set IVPR to kenrel entry point in second core boot page by Haiying Wang · Wed Dec 03 10:08:19 2008 -0500
  41. 9f4a689 85xx: Add basic e500mc core support by Kumar Gala · Thu Oct 23 01:47:38 2008 -0500
  42. b937cc5 85xx: Ensure timebase is zero on secondary cores by Kumar Gala · Mon Sep 08 08:51:29 2008 -0500
  43. ccdeac7 85xx: Rename CONFIG_NR_CPUS to CONFIG_NUM_CPUS by Kumar Gala · Mon Aug 11 11:29:28 2008 -0500
  44. 398dcd6 85xx: Additional fixes and cleanup of MP code by Kumar Gala · Mon Apr 28 02:24:04 2008 -0500
  45. deeac57 85xx: Update multicore boot mechanism to ePAPR v0.81 spec by Kumar Gala · Wed Mar 26 08:34:25 2008 -0500
  46. 36d6b3f 85xx: Added support for multicore boot mechanism by Kumar Gala · Thu Jan 17 16:48:33 2008 -0600