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git01.mediatek.com / filogic / uboot / 0e806a7a0e336fe89ce090bab8c422889aae5e46 / arch / arm / mach-imx / mx6 / ddr.c
  1. 60649bb Merge git://git.denx.de/u-boot-spi by Tom Rini · Fri Jan 26 07:46:34 2018 -0500
  2. 918de03 wait_bit: use wait_for_bit_le32 and remove wait_for_bit by Álvaro Fernández Rojas · Tue Jan 23 17:14:55 2018 +0100
  3. 8548f97 mx6: ddr: Do not access MMDC_P1_BASE_ADDR on i.MX6ULL by Fabio Estevam · Mon Jan 01 22:51:45 2018 -0200
  4. 1b691df mx6ull: Handle the CONFIG_MX6ULL cases correctly by Fabio Estevam · Wed Jan 03 12:33:05 2018 -0200
  5. 33731bc imx: reorganize IMX code as other SOCs by Stefano Babic · Thu Jun 29 10:16:06 2017 +0200[Renamed from arch/arm/cpu/armv7/mx6/ddr.c]
  6. c448df7 ARM: mx6: ddr: use Kconfig for inclusion of DDR calibration routines by Eric Nelson · Sun Oct 30 16:33:50 2016 -0700
  7. ec4fe26 mx6: ddr: add routine to return DDR calibration data by Eric Nelson · Sun Oct 30 16:33:49 2016 -0700
  8. a09d68a mx6: ddr: pass mx6_ddr_sysinfo to calibration routines by Eric Nelson · Sun Oct 30 16:33:48 2016 -0700
  9. 4285a53 mx6: ddr: allow 32 cycles for DQS gating calibration by Eric Nelson · Sun Oct 30 16:33:47 2016 -0700
  10. cb3c121 mx6: ddr: Allow changing REFSEL and REFR fields by Fabio Estevam · Mon Aug 29 20:37:15 2016 -0300
  11. 9dba13b imx: mx6: ddr: support i.MX6D/QPlus by Peng Fan · Mon May 23 18:35:57 2016 +0800
  12. 6861c5a imx: mx6: use simpler runtime cpu dection macros by Peng Fan · Mon May 23 18:35:54 2016 +0800
  13. 2302357 arm: imx6: Switch DDR3 calibration to wait_for_bit() by Marek Vasut · Wed Mar 02 14:49:51 2016 +0100
  14. ab257ed arm: imx6: Add DDR3 calibration code for MX6 Q/D/DL by Marek Vasut · Wed Dec 16 15:40:06 2015 +0100
  15. 4648332 imx: ddr: drop duplicated debug info by Peng Fan · Thu Oct 15 18:06:00 2015 +0800
  16. b96b74c Revert "imx: mx6: ddr correct tRFC and tXS" by Peng Fan · Tue Sep 01 11:03:14 2015 +0800
  17. da7ada0 imx: mx6: ddr: add LPDDR2 support by Peng Fan · Mon Aug 17 16:11:04 2015 +0800
  18. 77e8695 imx: mx6: ddr init MMDC according to ddr_type by Peng Fan · Mon Aug 17 16:11:03 2015 +0800
  19. d226fac imx: mx6: ddr add dram io configuration and header file for i.MX6SL by Peng Fan · Mon Aug 17 16:11:00 2015 +0800
  20. 6b43bbd imx: mx6: ddr correct tRFC and tXS by Peng Fan · Mon Aug 17 16:10:59 2015 +0800
  21. 1b81b06 imx: mx6: ddr no support MMDC1 for i.MX6SL by Peng Fan · Mon Aug 17 16:10:58 2015 +0800
  22. 98f11a1 imx:mx6ul add dram spl configuration and header file by Peng Fan · Mon Jul 20 19:28:33 2015 +0800
  23. 591fe97 arm: mx6: ddr: set fast-exit on DDR3 if pd_fast_exit specified by Tim Harvey · Mon May 18 07:07:02 2015 -0700
  24. a2534ba arm: mx6: ddr3: Remove dead code by Nikolay Dimitrov · Fri May 08 13:06:50 2015 +0300
  25. 99c25ff arm: mx6: Clamp MMDC and DDR3 clocks for timing calculations by Nikolay Dimitrov · Wed Apr 22 18:37:31 2015 +0300
  26. fe1723f arm: mx6: ddr: add pd_fast_exit flag to system information by Tim Harvey · Fri Apr 03 16:52:52 2015 -0700
  27. 2ecdd02 imx:mx6sx add dram io configure for mx6sx by Peng Fan · Tue Dec 30 17:24:01 2014 +0800
  28. b62b39b cosmetic: replace MIN, MAX with min, max by Masahiro Yamada · Thu Sep 18 13:28:06 2014 +0900
  29. 4a50ec2 arm: mx6: ddr: fix cs0_end calculation by Nikita Kiryanov · Wed Aug 20 15:08:58 2014 +0300
  30. a810c95 arm: mx6: ddr: configure MMDC for slow_pd by Nikita Kiryanov · Wed Aug 20 15:08:57 2014 +0300
  31. 6816f71 arm: mx6: ddr: do not write into reserved bit by Nikita Kiryanov · Wed Aug 20 15:08:56 2014 +0300
  32. c475346 arm: mx6: ddr: cleanup by Nikita Kiryanov · Sun Sep 07 18:58:11 2014 +0300
  33. 4a46360 ARM: mx6: Handle the MMDCx_MDCTL COL field caprices by Marek Vasut · Mon Aug 04 01:47:10 2014 +0200
  34. 8ab871b mx6: add mmdc configuration for MX6Q/MX6DL by Tim Harvey · Mon Jun 02 16:13:23 2014 -0700