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git01.mediatek.com / filogic / uboot / 0ae6f512761811d387dda4f974b767c6a2f4f0d2 / arch / x86 / cpu / coreboot
  1. 8226dfd kbuild: move asm-offsets.c from SoC directory to arch/$(ARCH)/lib by Masahiro Yamada · Tue Mar 18 16:38:13 2014 +0900
  2. aa96dd1 x86: convert makefiles to Kbuild style by Masahiro Yamada · Mon Oct 21 11:53:34 2013 +0900
  3. bd8ec7e Coding Style cleanup: remove trailing white space by Wolfgang Denk · Mon Oct 07 13:07:26 2013 +0200
  4. c57eadc SPDX-License-Identifier: convert BSD-3-Clause files by Wolfgang Denk · Sun Jul 28 22:12:47 2013 +0200
  5. 9215e0b config: don't define CONFIG_ARCH_DEVICE_TREE by Stephen Warren · Wed Jul 24 10:09:22 2013 -0700
  6. d79de1d Add GPL-2.0+ SPDX-License-Identifier to source files by Wolfgang Denk · Mon Jul 08 09:37:19 2013 +0200
  7. eb2fd5c x86: Add coreboot timestamps by Simon Glass · Wed Apr 17 16:13:48 2013 +0000
  8. 24f19b4 x86: Support adding coreboot timestanps to bootstage by Simon Glass · Wed Apr 17 16:13:47 2013 +0000
  9. 11d7a5b x86: Add TSC timer by Simon Glass · Wed Apr 17 16:13:36 2013 +0000
  10. ace6cd8 x86: Implement panic output for coreboot by Simon Glass · Wed Apr 17 16:13:34 2013 +0000
  11. 6dd76f6 x86: Fix DRAM bank size init with generic board by Simon Glass · Mon Apr 15 11:22:49 2013 +0000
  12. 3e93e33 x86: Use sections header to obtain link symbols by Simon Glass · Tue Mar 05 14:39:54 2013 +0000
  13. 6fa6e4a x86: Permit bootstage and timer data to be used prior to relocation by Simon Glass · Thu Feb 28 19:26:12 2013 +0000
  14. 3297d4d x86: Add function to get top of usable ram by Simon Glass · Thu Feb 28 19:26:10 2013 +0000
  15. d1c0d2c x86: drop unused code in coreboot.c by Stefan Reinauer · Sat Nov 03 11:41:39 2012 +0000
  16. 965b90b x86: Remove coreboot_ from file name by Stefan Reinauer · Sat Nov 03 11:41:38 2012 +0000
  17. 56cee44 x86: Provide a way to throttle port80 accesses by Vadim Bendebury · Sat Nov 03 11:41:37 2012 +0000
  18. 33307c4 x86: Issue SMI to finalize Coreboot in final stage by Duncan Laurie · Sat Nov 03 11:41:35 2012 +0000
  19. 115f747 x86: Fix MTRR clear to detect which MTRR to use by Duncan Laurie · Mon Dec 03 13:59:00 2012 +0000
  20. 43a2fdd x86: Emit port 80 post codes in show_boot_progress() by Stefan Reinauer · Mon Dec 03 13:58:12 2012 +0000
  21. ef4356d x86: coreboot: Set CONFIG_ARCH_DEVICE_TREE correctly by Gabe Black · Sat Nov 03 11:41:31 2012 +0000
  22. 7169ce3 x86: Override calculate_relocation_address to use the e820 map by Gabe Black · Mon Dec 03 14:26:08 2012 +0000
  23. 5dfabfa x86: Ignore memory >4GB when parsing Coreboot tables by Duncan Laurie · Tue Oct 23 18:04:42 2012 +0000
  24. 101e4b7 x86: Clean up MTRR 7 right before jumping to the kernel by Stefan Reinauer · Sun Dec 02 04:49:53 2012 +0000
  25. f0c7e2a x86: Fill in the dram info using the e820 map on coreboot/x86 by Gabe Black · Tue Oct 23 18:04:35 2012 +0000
  26. 5220654 x86: Enable coreboot timestamp facility support in u-boot. by Vadim Bendebury · Tue Oct 23 18:04:33 2012 +0000
  27. bc30b21 x86: coreboot: Decode additional coreboot sysinfo tags by Simon Glass · Fri Oct 12 18:48:46 2012 +0000
  28. 9a03c91 x86: coreboot: Drop sysinfo.c by Stefan Reinauer · Fri Oct 12 18:48:45 2012 +0000
  29. 57c5574 x86: coreboot: Implement recursively scanning PCI busses by Gabe Black · Wed Oct 10 13:12:59 2012 +0000
  30. 67bb7b0 x86: coreboot: Tell u-boot about PCI bus 0 when initializing by Gabe Black · Wed Oct 10 13:12:57 2012 +0000
  31. 565456b x86: coreboot: Move non-board specific files to coreboot arch directory by Stefan Reinauer · Wed Oct 10 13:12:56 2012 +0000
  32. 84231af x86: Add infrastructure to extract an e820 table from the coreboot tables by Gabe Black · Mon Dec 05 12:09:25 2011 +0000
  33. 9fd7a1f x86: Import code from coreboot's libpayload to parse the coreboot table by Gabe Black · Mon Dec 05 12:09:22 2011 +0000
  34. 27a4d07 x86: Initial commit for running as a coreboot payload by Gabe Black · Tue Nov 29 18:05:07 2011 +0000