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git01.mediatek.com / filogic / uboot / 0a8875454278a129dda19d4f913ef15ac55bfebd / arch / arm / mach-sunxi / dram_sun4i.c
  1. dbd7954 common: Drop linux/delay.h from common header by Simon Glass · 4 years, 7 months ago
  2. 8e16b1e common: Move RAM-sizing functions to init.h by Simon Glass · 5 years ago
  3. cb9325d sunxi: Fix typos of spelling Allwinner by Priit Laes · 6 years ago
  4. 10e4779 SPDX: Convert all of our single license tags to Linux Kernel style by Tom Rini · 7 years ago
  5. 8dd84a7 sunxi: Move cpu independent code to mach directory by Alexander Graf · 9 years ago[Renamed from arch/arm/cpu/armv7/sunxi/dram_sun4i.c]
  6. ffdc05c sunxi: Make DRAM_ODT_EN Kconfig setting a bool by Hans de Goede · 10 years ago
  7. 36b2570 sunxi: Move await_completion dram helper to dram.h by Hans de Goede · 10 years ago
  8. ad0dfc5 sun4i: Rename dram_clk_cfg to dram_clk_gate by Hans de Goede · 10 years ago
  9. 5037c45 sun4i: Rename dram files to dram_sun4i.x by Hans de Goede · 10 years ago[Renamed from arch/arm/cpu/armv7/sunxi/dram.c]
  10. 8f32aaa sunxi: Use CONFIG_MACH_SUN?I from Kconfig instead of CONFIG_SUN?I by Ian Campbell · 10 years ago
  11. 05e5bcb sunxi: Add CONFIG_OLD_SUNXI_KERNEL_COMPAT Kconfig option by Hans de Goede · 10 years ago
  12. 1c21155 sunxi: dram: Use clock_get_pll5p to calculate mbus, rather then hardcoding by Hans de Goede · 10 years ago
  13. ea7cdd1 sunxi: dram: Autodetect DDR3 bus width and density by Siarhei Siamashka · 10 years ago
  14. ac7b6fc sunxi: dram: Derive write recovery delay from DRAM clock speed by Siarhei Siamashka · 10 years ago
  15. b41aa97 sunxi: dram: Drop DDR2 support and assume only single rank DDR3 memory by Siarhei Siamashka · 10 years ago
  16. b1ace77 sunxi: dram: Configurable DQS gating window mode and delay by Siarhei Siamashka · 10 years ago
  17. c4f0aa5 sunxi: dram: Add a helper function 'mctl_get_number_of_lanes' by Siarhei Siamashka · 10 years ago
  18. 8e9c4fd sunxi: dram: Improve DQS gate data training error handling by Siarhei Siamashka · 10 years ago
  19. 020a634 sunxi: dram: Use divisor P=1 for PLL5 by Siarhei Siamashka · 10 years ago
  20. 586757a sunxi: dram: Configurable MBUS clock speed (use PLL5 or PLL6) by Siarhei Siamashka · 10 years ago
  21. 3ad063a sunxi: dram: Re-introduce the impedance calibration ond ODT by Siarhei Siamashka · 10 years ago
  22. 72ed869 sunxi: dram: Add 'await_bits_clear'/'await_bits_set' helper functions by Siarhei Siamashka · 10 years ago
  23. d89297a sunxi: dram: Do DDR3 reset in the same way on sun4i/sun5i/sun7i by Siarhei Siamashka · 10 years ago
  24. 6f66418 sunxi: dram: Remove broken impedance and ODT configuration code by Siarhei Siamashka · 10 years ago
  25. ce4d21c sunxi: dram: Fix CKE delay handling for sun4i/sun5i by Siarhei Siamashka · 10 years ago
  26. a1d9f03 sunxi: dram: Respect the DDR3 reset timing requirements by Siarhei Siamashka · 10 years ago
  27. 551bfb9 sunxi: dram: Remove broken super-standby remnants by Siarhei Siamashka · 10 years ago
  28. 27942f1 sunxi: dram: Remove useless 'dramc_scan_dll_para()' function by Siarhei Siamashka · 10 years ago
  29. 8c1c782 sunxi: Add sun5i support by Hans de Goede · 10 years ago
  30. 3ab9c23 sunxi: Add sun4i support by Hans de Goede · 10 years ago
  31. 2f1afcc sunxi: add sun7i dram setup support by Ian Campbell · 11 years ago