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git01.mediatek.com / filogic / uboot / 0a2a5e13b292f6d592672c0e86a5318645830a2b / arch / arm / mach-rockchip / rk3036 / sdram_rk3036.c
  1. 9fbe17c rockchip: use 'arch-rockchip' as header file path by Kever Yang · Thu Mar 28 11:01:23 2019 +0800
  2. ecbea44 rockchip: rk3036: ram: update license by Kever Yang · Thu Dec 20 11:33:41 2018 +0800
  3. 10e4779 SPDX: Convert all of our single license tags to Linux Kernel style by Tom Rini · Sun May 06 17:58:06 2018 -0400
  4. 2fe4e51 rockchip: rk3036: sdram: correct setting for pll integer mode by Kever Yang · Thu Nov 30 16:51:21 2017 +0800
  5. f601930 rockchip: rk3036: update clock driver for ddr by Kever Yang · Thu Nov 30 16:51:20 2017 +0800
  6. ae0ec2c rockchip: rk3036: fix pll config for correct frequency by Kever Yang · Thu Nov 30 16:51:19 2017 +0800
  7. e71e248 rockchip: rk3036: sync os_reg2 define with other soc by Kever Yang · Tue Jun 13 16:10:46 2017 +0800
  8. 2236c84 rockchip: rk3036: change ddr frequency to 400M by Lin Huang · Wed Feb 17 15:55:05 2016 +0800
  9. 6991738 rockchip: rk3036 sdram setting cs1_row when rank larger than 1 by huang lin · Mon Dec 07 11:08:56 2015 +0800
  10. da98a5b rockchip: add rk3036 sdram driver by huang lin · Tue Nov 17 14:20:26 2015 +0800