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filogic
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0a14bace898c9439925d2d6075a16ebf6b3607d1
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arch
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arm
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dts
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zynqmp-zcu106-revA.dts
3cf07bf
arm64: zynqmp: Setup clock-output-names for si570 chips
by Michal Simek
· Wed Jul 18 12:10:02 2018 +0200
27915ff
arm64: zynqmp: Wire spi-flash compatible string with flashes
by Michal Simek
· Thu Jul 26 12:43:42 2018 +0200
57f100f
arm: zynq: Drop #address-cells and #size-cells from gpio-keys
by Michal Simek
· Fri Jun 08 09:36:12 2018 +0200
1a79c27
arm64: zynqmp: Add support for Xilinx zcu106-revA
by Michal Simek
· Wed Mar 28 15:43:51 2018 +0200