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git01.mediatek.com / filogic / uboot / 092071630c1f008f4686610abff4261bfdc4d0c5 / drivers / clk / ti
  1. a1b654b treewide: invaild -> invalid by Sean Anderson · Wed Dec 01 14:26:53 2021 -0500
  2. d441175 clk: ti: add am33xx/am43xx spread spectrum clock support by Dario Binacchi · Sun Sep 26 11:58:58 2021 +0200
  3. db4c2dc clk: ti: k3: Update driver to account for divider flags by Suman Anna · Tue Sep 07 17:16:58 2021 -0500
  4. 6bc722e clk: ti: k3-pll: Change DIV_CTRL programming to read-modify-write by Dave Gerlach · Tue Sep 07 17:16:57 2021 -0500
  5. 82ceb0d clk: add support for TI K3 SoC clocks by Tero Kristo · Fri Jun 11 11:45:14 2021 +0300
  6. 81744b7 clk: add support for TI K3 SoC PLL by Tero Kristo · Fri Jun 11 11:45:13 2021 +0300
  7. 1770884 clk: sci-clk: fix return value of set_rate by Tero Kristo · Fri Jun 11 11:45:10 2021 +0300
  8. eff80eb clk: ti: am3-dpll: use custom API for memory access by Dario Binacchi · Sat May 01 17:05:25 2021 +0200
  9. 3693460 clk: ti: gate: use custom API for memory access by Dario Binacchi · Sat May 01 17:05:24 2021 +0200
  10. ac7c705 clk: ti: change clk_ti_latch() signature by Dario Binacchi · Sat May 01 17:05:23 2021 +0200
  11. 6dfe426 clk: ti: add custom API for memory access by Dario Binacchi · Sat May 01 17:05:22 2021 +0200
  12. 9fcb0d7 clk: ti: improve debug messages for clkctrl driver by Dario Binacchi · Sat Feb 13 12:02:30 2021 +0100
  13. 3ba929a common: Drop asm/global_data.h from common header by Simon Glass · Fri Oct 30 21:38:53 2020 -0600
  14. f686e4d dm: fix build errors generated by last merges by Dario Binacchi · Fri Jan 15 09:10:26 2021 +0100
  15. d4352b8 clk: move clk-ti-sci driver to 'ti' directory by Dario Binacchi · Wed Dec 30 00:16:20 2020 +0100
  16. 4707e38 clk: ti: omap4: add clock manager driver by Dario Binacchi · Wed Dec 30 00:16:18 2020 +0100
  17. 59ea184 clk: ti: add support for clkctrl clocks by Dario Binacchi · Wed Dec 30 00:06:39 2020 +0100
  18. b96e897 clk: ti: add gate clock driver by Dario Binacchi · Wed Dec 30 00:06:36 2020 +0100
  19. d284157 clk: ti: add divider clock driver by Dario Binacchi · Wed Dec 30 00:06:35 2020 +0100
  20. 6e6eb8b clk: ti: am33xx: add DPLL clock drivers by Dario Binacchi · Wed Dec 30 00:06:34 2020 +0100
  21. da3b020 clk: ti: add mux clock driver by Dario Binacchi · Wed Dec 30 00:06:32 2020 +0100