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git01.mediatek.com / filogic / uboot / 083c8470fb6311e7a811b7589d6d0b6615abc9f9 / cpu / ppc4xx / sdram.c
  1. 8d98230 [PATCH] Add support for AMCC Taishan PPC440GX eval board by Stefan Roese · Thu Jan 18 10:25:34 2007 +0100
  2. 76e3d2a [PATCH] 44x: Fix problem with DDR controller setup (refresh rate) by Stefan Roese · Sat Jan 06 15:58:09 2007 +0100
  3. 4963968 Add initial support for the ALPR board from Prodrive by Stefan Roese · Tue Aug 15 14:22:35 2006 +0200
  4. e335ee0 PPC440 DDR setup: Set SDRAM0_CFG0[PMU]=0 for best performance by Stefan Roese · Fri Jul 28 18:34:58 2006 +0200
  5. ebd3deb Some code cleanup by Wolfgang Denk · Sun Apr 16 10:51:58 2006 +0200
  6. fd63793 Updates to common PPC4xx onboard (DDR)SDRAM init code (405 and 440) by Stefan Roese · Fri Mar 17 10:28:24 2006 +0100
  7. c443fe9 Add support for Prodrive P3P440 board: by Stefan Roese · Tue Nov 22 13:20:42 2005 +0100
  8. 55ca749 cpu/ppc4xx/sdram.c rewritten now using get_ram_size() by stroese · Thu Jul 15 14:41:13 2004 +0000
  9. c45cfd0 Disable memory controller before setting first values. by stroese · Fri Sep 12 08:49:58 2003 +0000
  10. 57b2d80 * Code cleanup: by wdenk · Fri Jun 27 21:31:46 2003 +0000
  11. 41e2e05 Cleanup: remove trailing white space by wdenk · Tue Feb 11 01:49:43 2003 +0000
  12. 51c57b9 Added 4MByte and 128MByte onboard SDRAM by stroese · Mon Feb 10 16:26:37 2003 +0000
  13. c609719 Initial revision by wdenk · Sun Nov 03 00:24:07 2002 +0000