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git01.mediatek.com / filogic / uboot / 0725cf4e0745594dc7e0c8b257bd010ff744e9d4 / include / stm32_rcc.h
  1. 5d9950d treewide: Update email address Patrick Delaunay and Patrice Chotard by Patrice Chotard · Wed Dec 02 18:47:30 2020 +0100
  2. b139a5b misc: stm32: Add STM32MP1 support by Patrick Delaunay · Mon Jul 09 15:17:20 2018 +0200
  3. 7264aae clk: clk_stm32f: Use PLLSAIP as USB 48MHz clock by Patrice Chotard · Wed Apr 11 17:07:45 2018 +0200
  4. 10e4779 SPDX: Convert all of our single license tags to Linux Kernel style by Tom Rini · Sun May 06 17:58:06 2018 -0400
  5. ef77287 clk: clk_stm32f: Fix stm32_clk_get_rate() for timer by Patrice Chotard · Wed Feb 07 10:44:46 2018 +0100
  6. d11d391 stm32: migrate clock structs in include/stm32_rcc.h by Patrice Chotard · Wed Nov 15 13:14:53 2017 +0100
  7. 369d483 clk: clk_stm32fx: add clock configuration for mmc usage by Patrice Chotard · Wed Nov 15 13:14:52 2017 +0100
  8. 03f10a1 dm: misc: bind STM32F4/F7 clock from rcc MFD driver by Patrice Chotard · Wed Nov 15 13:14:51 2017 +0100