Gitiles
Code Review
Sign In
git01.mediatek.com
/
filogic
/
uboot
/
06e298d8c40165c6a999ca6346191bb7c5769921
/
drivers
/
ddr
/
marvell
/
a38x
/
ddr3_training.c
e2c524b
ddr: marvell: a38x: Add support for DDR4 from Marvell mv-ddr-marvell repository
by Tony Dinh
· Wed Jan 18 19:03:04 2023 -0800
3fd6633
WS cleanup: remove trailing empty lines
by Wolfgang Denk
· Mon Sep 27 17:42:36 2021 +0200
6d5e3fe
ddr: marvell: a38x: Sync code with Marvell mv-ddr-marvell repository
by Pali Rohár
· Tue Mar 02 11:17:41 2021 +0100
efaf271
ddr: marvell: a38x: fix comment in conditional macro
by Marek Behún
· Fri Feb 19 17:11:26 2021 +0100
b9eaf11
ddr: marvell: a38x: import code change from upstream
by Marek Behún
· Fri Feb 19 17:11:23 2021 +0100
dbd7954
common: Drop linux/delay.h from common header
by Simon Glass
· Sun May 10 11:40:11 2020 -0600
0f2af88
common: Drop log.h from common header
by Simon Glass
· Sun May 10 11:40:05 2020 -0600
24a1d13
ddr: marvell: a38x: allow board specific clock out setup
by Baruch Siach
· Mon Jan 20 14:20:06 2020 +0200
4bf81db
ARM: mvebu: a38x: sync ddr training code with mv_ddr-armada-18.09.02
by Chris Packham
· Mon Dec 03 14:26:49 2018 +1300
3a09e13
ARM: mvebu: a38x: restore support for setting timing
by Chris Packham
· Thu May 10 13:28:30 2018 +1200
1a07d21
ARM: mvebu: a38x: sync ddr training code with upstream
by Chris Packham
· Thu May 10 13:28:29 2018 +1200
5ec8ff7
ARM: mvebu: a38x: remove some unused code
by Chris Packham
· Thu May 10 13:28:28 2018 +1200
10e4779
SPDX: Convert all of our single license tags to Linux Kernel style
by Tom Rini
· Sun May 06 17:58:06 2018 -0400
5450f0c
ddr: marvell: update ddr controller init and freq
by Chris Packham
· Thu Jan 18 17:16:10 2018 +1300
1324fab
ddr: marvell: use correct TREFI value
by Chris Packham
· Thu Jan 18 17:16:08 2018 +1300
ae80614
ddr: marvell: only assert M_ODT[0] on write for a single CS
by Chris Packham
· Thu Jan 18 17:16:07 2018 +1300
f8bf75f
driver/ddr: Add support for setting timing in hws_topology_map
by Marek Behún
· Fri Jun 09 19:28:40 2017 +0200
c5b1e5d
Various, accumulated typos collected from around the tree.
by Robert P. J. Day
· Wed Sep 07 14:27:59 2016 -0400
5ffceb8
arm: mvebu: Add Armada 38x DDR3 training code from Marvell bin_hdr
by Stefan Roese
· Thu Mar 26 15:36:56 2015 +0100