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filogic
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uboot
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06d6ebc494b5a2bb39cd79e66d48726bc687967a
/
drivers
/
clk
/
sunxi
/
clk_a10.c
751c6c6
clk: sunxi: Use a single driver for all variants
by Samuel Holland
· Mon May 09 00:29:34 2022 -0500
1567fdf
reset: sunxi: Get the reset count from the CCU descriptor
by Samuel Holland
· Mon May 09 00:29:33 2022 -0500
8443650
clk: sunxi: Store the array sizes in the CCU descriptor
by Samuel Holland
· Mon May 09 00:29:31 2022 -0500
3e9aa0b
clk: sunxi: add PIO bus gate clocks
by Andre Przywara
· Wed May 04 22:10:28 2022 +0100
fa7a7fa
clk: sunxi: Add support for I2C gates/resets
by Samuel Holland
· Sun Sep 12 09:47:24 2021 -0500
12e3faa
clk: sunxi: Move header out of arch directory
by Samuel Holland
· Sun Sep 12 11:48:43 2021 -0500
8a2b47f
dm: treewide: Rename auto_alloc_size members to be shorter
by Simon Glass
· Thu Dec 03 16:55:17 2020 -0700
4dcacfc
common: Drop linux/bitops.h from common header
by Simon Glass
· Sun May 10 11:40:13 2020 -0600
53698b2
clk: sunxi: a10: Add CLK_AHB_GMAC
by Jagan Teki
· Thu Mar 28 13:46:11 2019 +0530
f4b29f4
clk: sunxi: Implement A10 EMAC clocks
by Jagan Teki
· Thu Feb 28 00:26:49 2019 +0530
bc12313
clk: sunxi: Implement SPI clocks, resets
by Jagan Teki
· Wed Feb 27 20:02:06 2019 +0530
ddf33c1
sunxi: clk: add MMC gates/resets
by Andre Przywara
· Tue Jan 29 15:54:09 2019 +0000
8cf08ea
clk: sunxi: Implement UART clocks
by Jagan Teki
· Sun Dec 30 21:29:24 2018 +0530
b38f7af
clk: sunxi: Add Allwinner A10/A20 CLK driver
by Jagan Teki
· Thu Aug 02 16:52:37 2018 +0530