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git01.mediatek.com / filogic / uboot / 06d66af7e2b6a83a0263074aa5775e53ca0b127d / drivers / mmc / socfpga_dw_mmc.c
  1. c4b66c4 arm: socfpga: fix up a questionable macro for SDMMC by Dinh Nguyen · Wed Dec 02 13:31:33 2015 -0600
  2. ae66f3c mmc: dwmmc: socfpga: Convert to DM by Marek Vasut · Mon Nov 30 20:41:04 2015 +0100
  3. 48e7bf9 mmc: socfpga_dw_mmc: Move drvsel and smplsel to dts by Chin Liang See · Thu Nov 26 09:43:43 2015 +0800
  4. 1749723 mmc: dw_mmc: Probe the MMC from OF by Marek Vasut · Sat Jul 25 10:48:14 2015 +0200
  5. 51d2113 arm: socfpga: mmc: Pick the clock from clock manager by Pavel Machek · Mon Sep 08 14:08:45 2014 +0200
  6. 1d45a44 socfpga: cleanup socfpga_dw_mmc by Pavel Machek · Mon Jul 21 13:30:19 2014 +0200
  7. 91c2f8f socfpga: fix clock manager register definition by Pavel Machek · Sat Jul 19 23:57:59 2014 +0200
  8. cca9f45 socfpga/dwmmc: Adding DesignWare MMC driver support for SOCFPGA by Chin Liang See · Mon Dec 30 18:26:14 2013 -0600