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filogic
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uboot
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06c91f0513cf758610971f8285600c336a13ed91
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arch
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riscv
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cpu
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cpu.c
fc55736
event: Convert arch_cpu_init_dm() to use events
by Simon Glass
· Fri Mar 04 08:43:05 2022 -0700
dc35df4
riscv: Remove OF_PRIOR_STAGE from RISC-V boards
by Ilias Apalodimas
· Tue Oct 12 00:00:13 2021 +0300
cc382ff
sysreset: provide SBI based sysreset driver
by Heinrich Schuchardt
· Sun Sep 12 21:11:46 2021 +0200
4bebdd3
treewide: Convert macro and uses of __section(foo) to __section("foo")
by Marek Behún
· Thu May 20 13:23:52 2021 +0200
2612080
riscv: cpu: Add callback to init each core
by Green Wan
· Sun May 02 23:23:04 2021 -0700
dd1cd70
riscv: Clear pending IPIs on initialization
by Sean Anderson
· Mon Sep 21 07:51:38 2020 -0400
257875d
riscv: Make SiFive HiFive Unleashed board boot again
by Bin Meng
· Sun Jul 19 23:17:07 2020 -0700
7f4b666
riscv: Add option to support RISC-V privileged spec 1.9
by Sean Anderson
· Wed Jun 24 06:41:19 2020 -0400
b1d0cb3
riscv: Clean up IPI initialization code
by Sean Anderson
· Wed Jun 24 06:41:18 2020 -0400
4dcacfc
common: Drop linux/bitops.h from common header
by Simon Glass
· Sun May 10 11:40:13 2020 -0600
9758973
common: Drop init.h from common header
by Simon Glass
· Sun May 10 11:40:02 2020 -0600
6134659
riscv: add run mode configuration for SPL
by Lukas Auer
· Wed Aug 21 21:14:43 2019 +0200
f942636
riscv: Access CSRs using CSR numbers
by Bin Meng
· Wed Jul 10 23:43:13 2019 -0700
3043b90
riscv: prior_stage_fdt_address should only be used when OF_PRIOR_STAGE is enabled
by Rick Chen
· Tue Apr 30 13:49:35 2019 +0800
e5e6c36
riscv: Introduce CONFIG_XIP to support booting from flash
by Rick Chen
· Tue Apr 30 13:49:33 2019 +0800
a359665
riscv: add support for multi-hart systems
by Lukas Auer
· Sun Mar 17 19:28:37 2019 +0100
a7544ed
riscv: Do some basic architecture level cpu initialization
by Bin Meng
· Wed Dec 12 06:12:40 2018 -0800
edfe9a9
riscv: Update supports_extension() to use desc from cpu driver
by Bin Meng
· Wed Dec 12 06:12:38 2018 -0800
2caa1ee
riscv: Remove non-DM version of print_cpuinfo()
by Bin Meng
· Wed Dec 12 06:12:35 2018 -0800
7a3bbfb
riscv: Probe cpus during boot
by Bin Meng
· Wed Dec 12 06:12:34 2018 -0800
39a652b
riscv: save hart ID and device tree passed by prior boot stage
by Lukas Auer
· Thu Nov 22 11:26:29 2018 +0100
055700e
riscv: Add a helper routine to print CPU information
by Bin Meng
· Wed Sep 26 06:55:14 2018 -0700