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git01.mediatek.com / filogic / uboot / 05b354b73208b6bfb8c3981c95e549fab2d6299c / arch / arm / dts / socfpga.dtsi
  1. 57f03d2 ARM: socfpga: Convert to DM serial by Marek Vasut · Fri May 11 22:26:35 2018 +0200
  2. 10e4779 SPDX: Convert all of our single license tags to Linux Kernel style by Tom Rini · Sun May 06 17:58:06 2018 -0400
  3. e5715b1 arm: dts: socfpga: add reset property by Dinh Nguyen · Wed Apr 04 17:18:23 2018 -0500
  4. 2c24f8b arm: dts: socfpga: enables i2c0 in socfpga_de0_nano by Dinh Nguyen · Wed Apr 04 17:18:22 2018 -0500
  5. feaa3f9 dts: cadence_spi: Sync DT bindings with Linux by Jason Rush · Tue Jan 23 17:13:10 2018 -0600
  6. 4201cc0 arm: socfpga: dts: Add bank-name property to each GPIO bank by Marek Vasut · Mon Aug 10 17:20:23 2015 +0200
  7. aa66c84 arm: socfpga: Make the DT mmc node consistent by Marek Vasut · Sun Aug 02 22:55:24 2015 +0200
  8. 79021fc arm: dts: socfpga: Add mmc alias by Marek Vasut · Sat Jul 25 10:47:22 2015 +0200
  9. ffccc62 arm: dts: socfpga: Fix SPI aliases by Marek Vasut · Tue Jul 21 11:25:14 2015 +0200
  10. 480f3b5 spi: cadence_qspi: get sram size from device tree by Vikas Manocha · Thu Jul 02 18:29:44 2015 -0700
  11. f310d0d dt: socfpga: Replace num-chipselect with num-cs by Marek Vasut · Wed Dec 31 20:14:56 2014 +0100
  12. 67e767d dt: socfpga: Rename snps, dw-spi-mmio to snps, dw-apb-ssi by Marek Vasut · Wed Dec 31 20:14:55 2014 +0100
  13. 33432c3 arm: socfpga: dts: Add spi0/1 dts nodes for the Designware master SPI devices by Stefan Roese · Fri Nov 07 13:50:32 2014 +0100
  14. 2948d19 arm: socfpga: dts: Add Cadence QSPI DT node to socfpga.dtsi by Stefan Roese · Fri Nov 07 12:37:50 2014 +0100
  15. d3b436e arm: socfpga: dts: Move to SPDX license identifiers by Stefan Roese · Fri Nov 14 08:10:44 2014 +0100
  16. 76ba23f arm: socfpga: Add DT support for SoCFPGA and add socfpga_socrates target by Stefan Roese · Fri Nov 07 14:10:41 2014 +0100