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git01.mediatek.com / filogic / uboot / 038bacadf8523465dda73bc270580f3a034c24c6 / drivers / video / ipu_common.c
  1. dec2aef ipu common: reset ipuv3 correctly by Liu Ying · Sat Oct 06 04:16:04 2012 +0000
  2. 461a00a mx5: Use explicit clock gate names by Benoît Thébaudeau · Thu Sep 27 10:21:00 2012 +0000
  3. e427954 i.MX6: provide functional names for CCM_CCGR0-CCGR6 bit fields by Eric Nelson · Fri Sep 21 07:33:51 2012 +0000
  4. 5018c55 ipu_common: Add ldb_clk for use in parenting the pixel clock by Eric Nelson · Thu May 31 07:24:02 2012 +0000
  5. 82692e2 ipu_common: Do not hardcode the ipu_clk frequency by Fabio Estevam · Thu May 31 07:24:00 2012 +0000
  6. 2e1b929 ipu_common: Rename MXC_CCM_BASE by Fabio Estevam · Thu May 31 07:23:59 2012 +0000
  7. 581a17e ipu_common: Let clk_ipu_enable/disable only run on MX51 and MX53 by Fabio Estevam · Thu May 31 07:23:58 2012 +0000
  8. 0dfdcac ipu_common: Only apply the erratum to MX51 by Fabio Estevam · Thu May 31 07:23:57 2012 +0000
  9. ed5939d MX51: Add IPU driver for video support by Stefano Babic · Wed Oct 13 12:16:35 2010 +0200