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git01.mediatek.com / filogic / uboot / 01bcfc20370db1c3d89d8c6b98a1fbb24eeb1c06 / board / xilinx / versal
  1. f56f7d1 arm64: versal: Move IOU_SWITCH_DIVISOR0 to Kconfig by Michal Simek · Mon Jan 28 11:12:41 2019 +0100
  2. 19f6c97 arm64: versal: Remove one level of indentation in board_early_init_r() by Michal Simek · Mon Jan 28 11:08:00 2019 +0100
  3. 4b066a1 arm64: versal: Add support for new Xilinx Versal ACAPs by Michal Simek · Wed Aug 22 14:55:27 2018 +0200