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git01.mediatek.com / filogic / uboot / 00784e099101f07e3f036b4eecdc1110441f5489 / board / xilinx / versal
  1. 00784e0 arm64: versal: Add new jtag distro boot command by Siva Durga Prasad Paladugu · 5 years ago
  2. 21eb5cc arm64: versal: Enable memory mapping via DT by Michal Simek · 6 years ago
  3. c5cf9d1 arm64: versal: Set initrd_high to as high as possible by Siva Durga Prasad Paladugu · 5 years ago
  4. b739897 arm64: versal: fpga: Add PL bit stream load support by Siva Durga Prasad Paladugu · 5 years ago
  5. 37c2ff8 arm64: versal: Define board_late_init for versal by Siva Durga Prasad Paladugu · 6 years ago
  6. f56f7d1 arm64: versal: Move IOU_SWITCH_DIVISOR0 to Kconfig by Michal Simek · 6 years ago
  7. 19f6c97 arm64: versal: Remove one level of indentation in board_early_init_r() by Michal Simek · 6 years ago
  8. 4b066a1 arm64: versal: Add support for new Xilinx Versal ACAPs by Michal Simek · 6 years ago