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git01.mediatek.com / filogic / uboot / 00238615b2cc2b7d620d0c9ca96b7e37b6aea501 / drivers / ddr / marvell / a38x / ddr3_init.h
  1. 4bf81db ARM: mvebu: a38x: sync ddr training code with mv_ddr-armada-18.09.02 by Chris Packham · Mon Dec 03 14:26:49 2018 +1300
  2. 1a07d21 ARM: mvebu: a38x: sync ddr training code with upstream by Chris Packham · Thu May 10 13:28:29 2018 +1200
  3. 5ec8ff7 ARM: mvebu: a38x: remove some unused code by Chris Packham · Thu May 10 13:28:28 2018 +1200
  4. 10e4779 SPDX: Convert all of our single license tags to Linux Kernel style by Tom Rini · Sun May 06 17:58:06 2018 -0400
  5. ae80614 ddr: marvell: only assert M_ODT[0] on write for a single CS by Chris Packham · Thu Jan 18 17:16:07 2018 +1300
  6. edfdb99 Fix spelling of "occurred". by Vagrant Cascadian · Sat Apr 30 19:18:00 2016 -0700
  7. 69bab55 bitops: introduce BIT() definition by Heiko Schocher · Mon Sep 07 13:43:52 2015 +0200
  8. 5ffceb8 arm: mvebu: Add Armada 38x DDR3 training code from Marvell bin_hdr by Stefan Roese · Thu Mar 26 15:36:56 2015 +0100