Blame - arch/arm/mach-mvebu/Kconfig - filogic/uboot

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Stefan Roese	383e0c1	2015-08-25 13:18:38 +0200	[diff] [blame]	1	if ARCH_MVEBU
				2
Mario Six	10d1449	2017-01-11 16:01:00 +0100	[diff] [blame]	3	config HAVE_MVEBU_EFUSE
				4	bool
Mario Six	10d1449	2017-01-11 16:01:00 +0100	[diff] [blame]	5
Stefan Roese	05b1765	2016-05-17 15:00:30 +0200	[diff] [blame]	6	config ARMADA_32BIT
				7	bool
Michal Simek	7e7ba3b	2018-07-23 15:55:15 +0200	[diff] [blame]	8	select BOARD_EARLY_INIT_F
Lokesh Vutla	81b1a67	2018-04-26 18:21:26 +0530	[diff] [blame]	9	select CPU_V7A
Stefan Roese	1f1b3e9	2019-04-11 08:58:32 +0200	[diff] [blame]	10	select SPL_DM if SPL
				11	select SPL_DM_SEQ_ALIAS if SPL
				12	select SPL_OF_CONTROL if SPL
Tom Rini	b7cc2fe	2021-10-15 10:54:41 -0400	[diff] [blame]	13	select SPL_SKIP_LOWLEVEL_INIT if SPL
Stefan Roese	1f1b3e9	2019-04-11 08:58:32 +0200	[diff] [blame]	14	select SPL_SIMPLE_BUS if SPL
Michal Simek	7e7ba3b	2018-07-23 15:55:15 +0200	[diff] [blame]	15	select SUPPORT_SPL
Philip Oberfichtner	5833e1b	2022-08-17 15:07:12 +0200	[diff] [blame]	16	select SYS_L2_PL310 if !SYS_L2CACHE_OFF
Stefan Roese	85bddff	2019-04-12 16:42:28 +0200	[diff] [blame]	17	select TRANSLATION_OFFSET
Alexander Dahl	3f3c838	2023-12-21 08:26:10 +0100	[diff] [blame]	18	select TOOLS_KWBIMAGE if SPL
Pali Rohár	c5c28df	2022-04-06 16:20:20 +0200	[diff] [blame]	19	select SPL_SYS_NO_VECTOR_TABLE if SPL
Pali Rohár	aaed328	2022-05-06 11:05:14 +0200	[diff] [blame]	20	select ARCH_VERY_EARLY_INIT
Stefan Roese	05b1765	2016-05-17 15:00:30 +0200	[diff] [blame]	21
Stefan Roese	05b1765	2016-05-17 15:00:30 +0200	[diff] [blame]	22	# ARMv7 SoCs...
Stefan Roese	9106ed0	2016-01-29 09:14:54 +0100	[diff] [blame]	23	config ARMADA_375
				24	bool
Stefan Roese	05b1765	2016-05-17 15:00:30 +0200	[diff] [blame]	25	select ARMADA_32BIT
Stefan Roese	9106ed0	2016-01-29 09:14:54 +0100	[diff] [blame]	26
Stefan Roese	eb083e5	2015-12-21 13:56:33 +0100	[diff] [blame]	27	config ARMADA_38X
				28	bool
Stefan Roese	05b1765	2016-05-17 15:00:30 +0200	[diff] [blame]	29	select ARMADA_32BIT
Mario Six	10d1449	2017-01-11 16:01:00 +0100	[diff] [blame]	30	select HAVE_MVEBU_EFUSE
Stefan Roese	eb083e5	2015-12-21 13:56:33 +0100	[diff] [blame]	31
Joshua Scott	4ba8e99	2020-11-09 10:14:08 +1300	[diff] [blame]	32	config ARMADA_38X_HS_IMPEDANCE_THRESH
				33	hex "Armada 38x USB 2.0 High-Speed Impedance Threshold (0x0 - 0x7)"
				34	depends on ARMADA_38X
				35	default 0x6
				36	range 0x0 0x7
				37
Stefan Roese	eb083e5	2015-12-21 13:56:33 +0100	[diff] [blame]	38	config ARMADA_XP
				39	bool
Stefan Roese	05b1765	2016-05-17 15:00:30 +0200	[diff] [blame]	40	select ARMADA_32BIT
				41
				42	# ARMv8 SoCs...
				43	config ARMADA_3700
				44	bool
				45	select ARM64
Pali Rohár	70d9bee	2022-02-23 14:15:45 +0100	[diff] [blame]	46	select HAVE_MVEBU_EFUSE
Stefan Roese	eb083e5	2015-12-21 13:56:33 +0100	[diff] [blame]	47
Stefan Roese	cb41033	2016-05-25 08:13:45 +0200	[diff] [blame]	48	# Armada 7K and 8K are very similar - use only one Kconfig symbol for both
				49	config ARMADA_8K
				50	bool
				51	select ARM64
				52
Chris Packham	eaab461	2022-11-05 17:23:59 +1300	[diff] [blame]	53	config ALLEYCAT_5
				54	bool
				55	select ARM64
				56
Chris Packham	1d49668	2016-10-26 14:08:30 +1300	[diff] [blame]	57	# Armada PLL frequency (used for NAND clock generation)
				58	config SYS_MVEBU_PLL_CLOCK
				59	int
Chris Packham	a8f845e	2019-04-11 22:22:50 +1200	[diff] [blame]	60	default "2000000000" if ARMADA_XP \|\| ARMADA_3700 \|\| ARMADA_8K \|\| ARMADA_MSYS
Chris Packham	1d49668	2016-10-26 14:08:30 +1300	[diff] [blame]	61	default "1000000000" if ARMADA_38X \|\| ARMADA_375
				62
Stefan Roese	05b1765	2016-05-17 15:00:30 +0200	[diff] [blame]	63	# Armada XP/38x SoC types...
Phil Sutter	a7f94ad	2015-12-25 14:41:22 +0100	[diff] [blame]	64	config MV78230
				65	bool
				66	select ARMADA_XP
				67
				68	config MV78260
				69	bool
				70	select ARMADA_XP
Simon Glass	203b3ab	2017-06-14 21:28:24 -0600	[diff] [blame]	71	imply CMD_SATA
Phil Sutter	a7f94ad	2015-12-25 14:41:22 +0100	[diff] [blame]	72
				73	config MV78460
				74	bool
				75	select ARMADA_XP
				76
Chris Packham	a8f845e	2019-04-11 22:22:50 +1200	[diff] [blame]	77	config ARMADA_MSYS
				78	bool
				79	select ARMADA_32BIT
				80
				81	config 98DX4251
				82	bool
				83	select ARMADA_MSYS
				84
				85	config 98DX3336
				86	bool
				87	select ARMADA_MSYS
				88
				89	config 98DX3236
				90	bool
				91	select ARMADA_MSYS
				92
Chris Packham	f5fc25b	2016-09-22 12:56:13 +1200	[diff] [blame]	93	config 88F6820
Phil Sutter	a7f94ad	2015-12-25 14:41:22 +0100	[diff] [blame]	94	bool
				95	select ARMADA_38X
				96
Tom Rini	40a325f	2022-03-30 18:07:24 -0400	[diff] [blame]	97	config CUSTOMER_BOARD_SUPPORT
				98	bool
				99
Tony Dinh	63eba13	2023-02-01 15:13:05 -0800	[diff] [blame]	100	config DDR4
				101	bool "Support Marvell DDR4 Training driver"
				102
Stefan Roese	383e0c1	2015-08-25 13:18:38 +0200	[diff] [blame]	103	choice
Chris Packham	67b7d50	2022-11-05 17:24:00 +1300	[diff] [blame]	104	prompt "Armada XP/375/38x/3700/7K/8K/Alleycat-5 board select"
Stefan Roese	383e0c1	2015-08-25 13:18:38 +0200	[diff] [blame]	105	optional
				106
Stefan Roese	7360640	2015-10-20 15:14:47 +0200	[diff] [blame]	107	config TARGET_CLEARFOG
				108	bool "Support ClearFog"
Chris Packham	f5fc25b	2016-09-22 12:56:13 +1200	[diff] [blame]	109	select 88F6820
Baruch Siach	1c5e95d	2020-01-20 14:20:13 +0200	[diff] [blame]	110	select BOARD_LATE_INIT
Martin Rowe	7eceb67	2023-03-27 21:24:09 +1000	[diff] [blame]	111	select OF_BOARD_SETUP
Stefan Roese	7360640	2015-10-20 15:14:47 +0200	[diff] [blame]	112
Dennis Gilmore	77c3940	2018-06-11 19:39:53 -0500	[diff] [blame]	113	config TARGET_HELIOS4
				114	bool "Support Helios4"
				115	select 88F6820
				116
Konstantin Porotchkin	7f8dfea	2017-02-16 13:52:22 +0200	[diff] [blame]	117	config TARGET_MVEBU_ARMADA_37XX
				118	bool "Support Armada 37xx platforms"
Stefan Roese	6edf27e	2016-05-17 15:04:16 +0200	[diff] [blame]	119	select ARMADA_3700
Simon Glass	0e5faf0	2017-06-14 21:28:21 -0600	[diff] [blame]	120	imply SCSI
Stefan Roese	6edf27e	2016-05-17 15:04:16 +0200	[diff] [blame]	121
Stefan Roese	9106ed0	2016-01-29 09:14:54 +0100	[diff] [blame]	122	config TARGET_DB_88F6720
				123	bool "Support DB-88F6720 Armada 375"
				124	select ARMADA_375
				125
Stefan Roese	383e0c1	2015-08-25 13:18:38 +0200	[diff] [blame]	126	config TARGET_DB_88F6820_GP
				127	bool "Support DB-88F6820-GP"
Chris Packham	f5fc25b	2016-09-22 12:56:13 +1200	[diff] [blame]	128	select 88F6820
Stefan Roese	383e0c1	2015-08-25 13:18:38 +0200	[diff] [blame]	129
Chris Packham	a90dd4c	2016-09-22 12:56:14 +1200	[diff] [blame]	130	config TARGET_DB_88F6820_AMC
				131	bool "Support DB-88F6820-AMC"
				132	select 88F6820
				133
Marek Behún	09e16b8	2017-06-09 19:28:45 +0200	[diff] [blame]	134	config TARGET_TURRIS_OMNIA
				135	bool "Support Turris Omnia"
				136	select 88F6820
Marek Behún	0f2e66a	2019-05-02 16:53:37 +0200	[diff] [blame]	137	select BOARD_LATE_INIT
Marek Behún	1e4cbb9	2019-05-02 16:53:28 +0200	[diff] [blame]	138	select DM_I2C
				139	select I2C_MUX
				140	select I2C_MUX_PCA954x
Marek Behún	4c3abea	2021-10-09 19:33:46 +0200	[diff] [blame]	141	select SPL_DRIVERS_MISC
Marek Behún	1e4cbb9	2019-05-02 16:53:28 +0200	[diff] [blame]	142	select SPL_I2C_MUX
Marek Behún	ca6095b	2021-10-09 19:33:45 +0200	[diff] [blame]	143	select SPL_SYS_MALLOC_SIMPLE
Marek Behún	1e4cbb9	2019-05-02 16:53:28 +0200	[diff] [blame]	144	select SYS_I2C_MVTWSI
Marek Behún	5e92efe	2019-05-02 16:53:32 +0200	[diff] [blame]	145	select ATSHA204A
Marek Behún	09e16b8	2017-06-09 19:28:45 +0200	[diff] [blame]	146
Marek Behún	f835bed	2018-04-24 17:21:31 +0200	[diff] [blame]	147	config TARGET_TURRIS_MOX
Marek Behún	1b01011	2023-10-20 16:29:16 +0200	[diff] [blame]	148	bool "Support CZ.NIC's Turris Mox / RIPE Atlas Probe"
Marek Behún	f835bed	2018-04-24 17:21:31 +0200	[diff] [blame]	149	select ARMADA_3700
Marek Behún	1b01011	2023-10-20 16:29:16 +0200	[diff] [blame]	150	select BOARD_TYPES
				151	select ENV_IS_IN_MMC
				152	select ENV_IS_IN_SPI_FLASH
				153	select MULTI_DTB_FIT
Marek Behún	f835bed	2018-04-24 17:21:31 +0200	[diff] [blame]	154
Stefan Roese	5c806f1	2016-10-25 10:56:19 +0200	[diff] [blame]	155	config TARGET_MVEBU_ARMADA_8K
				156	bool "Support Armada 7k/8k platforms"
Stefan Roese	7be1b9b	2016-05-25 08:21:21 +0200	[diff] [blame]	157	select ARMADA_8K
Tom Rini	22d567e	2017-01-22 19:43:11 -0500	[diff] [blame]	158	select BOARD_LATE_INIT
Simon Glass	0e5faf0	2017-06-14 21:28:21 -0600	[diff] [blame]	159	imply SCSI
Stefan Roese	7be1b9b	2016-05-25 08:21:21 +0200	[diff] [blame]	160
Chris Packham	67b7d50	2022-11-05 17:24:00 +1300	[diff] [blame]	161	config TARGET_MVEBU_ALLEYCAT5
				162	bool "Support AlleyCat 5 platforms"
				163	select ALLEYCAT_5
				164
Konstantin Porotchkin	1d6ff1f	2021-03-16 17:20:57 +0100	[diff] [blame]	165	config TARGET_OCTEONTX2_CN913x
				166	bool "Support CN913x platforms"
				167	select ARMADA_8K
				168	imply BOARD_EARLY_INIT_R
				169	select BOARD_LATE_INIT
				170	imply SCSI
				171
Stefan Roese	383e0c1	2015-08-25 13:18:38 +0200	[diff] [blame]	172	config TARGET_DB_MV784MP_GP
				173	bool "Support db-mv784mp-gp"
Tom Rini	9a04d7d	2022-02-25 11:19:46 -0500	[diff] [blame]	174	select BOARD_ECC_SUPPORT
Phil Sutter	a7f94ad	2015-12-25 14:41:22 +0100	[diff] [blame]	175	select MV78460
Stefan Roese	383e0c1	2015-08-25 13:18:38 +0200	[diff] [blame]	176
Tony Dinh	6aebc1a	2023-02-09 14:00:03 -0800	[diff] [blame]	177	config TARGET_DS116
				178	bool "Support Synology DS116"
				179	select 88F6820
				180
Phil Sutter	d76eba6	2015-12-25 14:41:25 +0100	[diff] [blame]	181	config TARGET_DS414
				182	bool "Support Synology DS414"
				183	select MV78230
				184
Stefan Roese	383e0c1	2015-08-25 13:18:38 +0200	[diff] [blame]	185	config TARGET_MAXBCM
				186	bool "Support maxbcm"
Tom Rini	9a04d7d	2022-02-25 11:19:46 -0500	[diff] [blame]	187	select BOARD_ECC_SUPPORT
Phil Sutter	a7f94ad	2015-12-25 14:41:22 +0100	[diff] [blame]	188	select MV78460
Stefan Roese	383e0c1	2015-08-25 13:18:38 +0200	[diff] [blame]	189
Tony Dinh	63eba13	2023-02-01 15:13:05 -0800	[diff] [blame]	190	config TARGET_N2350
				191	bool "Support Thecus N2350"
				192	select 88F6820
				193	select DDR4
				194
Stefan Roese	459e064	2016-01-20 08:13:29 +0100	[diff] [blame]	195	config TARGET_THEADORABLE
				196	bool "Support theadorable Armada XP"
Tom Rini	22d567e	2017-01-22 19:43:11 -0500	[diff] [blame]	197	select BOARD_LATE_INIT if USB
Stefan Roese	459e064	2016-01-20 08:13:29 +0100	[diff] [blame]	198	select MV78260
Simon Glass	203b3ab	2017-06-14 21:28:24 -0600	[diff] [blame]	199	imply CMD_SATA
Stefan Roese	459e064	2016-01-20 08:13:29 +0100	[diff] [blame]	200
Dirk Eibach	fb60594	2017-02-22 16:07:23 +0100	[diff] [blame]	201	config TARGET_CONTROLCENTERDC
				202	bool "Support CONTROLCENTERDC"
				203	select 88F6820
Tom Rini	40a325f	2022-03-30 18:07:24 -0400	[diff] [blame]	204	select CUSTOMER_BOARD_SUPPORT
Dirk Eibach	fb60594	2017-02-22 16:07:23 +0100	[diff] [blame]	205
Chris Packham	b55b2c9	2019-01-10 21:01:00 +1300	[diff] [blame]	206	config TARGET_X530
				207	bool "Support Allied Telesis x530"
				208	select 88F6820
				209
Chris Packham	7325f1f	2023-07-10 10:47:36 +1200	[diff] [blame]	210	config TARGET_X240
				211	bool "Support Allied Telesis x240"
				212	select ALLEYCAT_5
				213
Chris Packham	199e318	2019-04-11 22:22:53 +1200	[diff] [blame]	214	config TARGET_DB_XC3_24G4XG
				215	bool "Support DB-XC3-24G4XG"
				216	select 98DX3336
				217
Luka Kovacic	25acb8b	2020-05-26 20:17:50 +0200	[diff] [blame]	218	config TARGET_CRS3XX_98DX3236
				219	bool "Support CRS3XX-98DX3236"
Luka Kovacic	b686e22	2019-05-07 19:35:55 +0200	[diff] [blame]	220	select 98DX3236
				221
Stefan Roese	383e0c1	2015-08-25 13:18:38 +0200	[diff] [blame]	222	endchoice
				223
Tom Rini	5918039	2021-08-21 13:50:13 -0400	[diff] [blame]	224	choice
				225	prompt "DDR bus width"
				226	default DDR_64BIT
				227	depends on ARMADA_XP
				228
				229	config DDR_64BIT
				230	bool "64bit bus width"
				231
				232	config DDR_32BIT
				233	bool "32bit bus width"
				234
				235	endchoice
				236
Tom Rini	592bcd0	2021-08-21 13:50:15 -0400	[diff] [blame]	237	config DDR_LOG_LEVEL
				238	int "DDR training code log level"
				239	depends on ARMADA_XP
				240	default 0
				241	range 0 3
				242	help
				243	Amount of information provided on error while running the DDR
				244	training code. At level 0, provides an error code in a case of
				245	failure, RL, WL errors and other algorithm failure. At level 1,
				246	provides the D-Unit setup (SPD/Static configuration). At level 2,
				247	provides the windows margin as a results of DQS centeralization.
				248	At level 3, rovides the windows margin of each DQ as a results of
				249	DQS centeralization.
				250
Marek Behún	90555af	2022-02-17 13:54:42 +0100	[diff] [blame]	251	config DDR_RESET_ON_TRAINING_FAILURE
				252	bool "Reset the board on DDR training failure instead of hanging"
				253	depends on ARMADA_38X \|\| ARMADA_XP
				254	help
				255	If DDR training fails in SPL, reset the board instead of hanging.
				256	Some boards are known to fail DDR training occasionally and an
				257	immediate reset may be preferable to waiting until the board is
				258	reset by watchdog (if there even is one).
				259
				260	Note that if booting via UART and the DDR training fails, the
				261	device will still hang - it doesn't make sense to reset the board
				262	in such a case.
				263
Tom Rini	9a04d7d	2022-02-25 11:19:46 -0500	[diff] [blame]	264	config BOARD_ECC_SUPPORT
				265	bool
				266
Stefan Roese	b9f41bf	2015-12-21 13:40:37 +0100	[diff] [blame]	267	config SYS_BOARD
				268	default "clearfog" if TARGET_CLEARFOG
Dennis Gilmore	77c3940	2018-06-11 19:39:53 -0500	[diff] [blame]	269	default "helios4" if TARGET_HELIOS4
Konstantin Porotchkin	7f8dfea	2017-02-16 13:52:22 +0200	[diff] [blame]	270	default "mvebu_armada-37xx" if TARGET_MVEBU_ARMADA_37XX
Stefan Roese	9106ed0	2016-01-29 09:14:54 +0100	[diff] [blame]	271	default "db-88f6720" if TARGET_DB_88F6720
Stefan Roese	b9f41bf	2015-12-21 13:40:37 +0100	[diff] [blame]	272	default "db-88f6820-gp" if TARGET_DB_88F6820_GP
Chris Packham	a90dd4c	2016-09-22 12:56:14 +1200	[diff] [blame]	273	default "db-88f6820-amc" if TARGET_DB_88F6820_AMC
Marek Behún	09e16b8	2017-06-09 19:28:45 +0200	[diff] [blame]	274	default "turris_omnia" if TARGET_TURRIS_OMNIA
Marek Behún	f835bed	2018-04-24 17:21:31 +0200	[diff] [blame]	275	default "turris_mox" if TARGET_TURRIS_MOX
Stefan Roese	5c806f1	2016-10-25 10:56:19 +0200	[diff] [blame]	276	default "mvebu_armada-8k" if TARGET_MVEBU_ARMADA_8K
Konstantin Porotchkin	1d6ff1f	2021-03-16 17:20:57 +0100	[diff] [blame]	277	default "octeontx2_cn913x" if TARGET_OCTEONTX2_CN913x
Stefan Roese	b9f41bf	2015-12-21 13:40:37 +0100	[diff] [blame]	278	default "db-mv784mp-gp" if TARGET_DB_MV784MP_GP
Tony Dinh	6aebc1a	2023-02-09 14:00:03 -0800	[diff] [blame]	279	default "ds116" if TARGET_DS116
Phil Sutter	d76eba6	2015-12-25 14:41:25 +0100	[diff] [blame]	280	default "ds414" if TARGET_DS414
Stefan Roese	b9f41bf	2015-12-21 13:40:37 +0100	[diff] [blame]	281	default "maxbcm" if TARGET_MAXBCM
Tony Dinh	63eba13	2023-02-01 15:13:05 -0800	[diff] [blame]	282	default "n2350" if TARGET_N2350
Stefan Roese	459e064	2016-01-20 08:13:29 +0100	[diff] [blame]	283	default "theadorable" if TARGET_THEADORABLE
Baruch Siach	daa6f08	2018-06-18 21:56:23 +0300	[diff] [blame]	284	default "a38x" if TARGET_CONTROLCENTERDC
Chris Packham	b55b2c9	2019-01-10 21:01:00 +1300	[diff] [blame]	285	default "x530" if TARGET_X530
Chris Packham	7325f1f	2023-07-10 10:47:36 +1200	[diff] [blame]	286	default "x240" if TARGET_X240
Chris Packham	199e318	2019-04-11 22:22:53 +1200	[diff] [blame]	287	default "db-xc3-24g4xg" if TARGET_DB_XC3_24G4XG
Luka Kovacic	25acb8b	2020-05-26 20:17:50 +0200	[diff] [blame]	288	default "crs3xx-98dx3236" if TARGET_CRS3XX_98DX3236
Chris Packham	67b7d50	2022-11-05 17:24:00 +1300	[diff] [blame]	289	default "mvebu_alleycat-5" if TARGET_MVEBU_ALLEYCAT5
Stefan Roese	b9f41bf	2015-12-21 13:40:37 +0100	[diff] [blame]	290
				291	config SYS_CONFIG_NAME
				292	default "clearfog" if TARGET_CLEARFOG
Dennis Gilmore	77c3940	2018-06-11 19:39:53 -0500	[diff] [blame]	293	default "helios4" if TARGET_HELIOS4
Konstantin Porotchkin	7f8dfea	2017-02-16 13:52:22 +0200	[diff] [blame]	294	default "mvebu_armada-37xx" if TARGET_MVEBU_ARMADA_37XX
Stefan Roese	9106ed0	2016-01-29 09:14:54 +0100	[diff] [blame]	295	default "db-88f6720" if TARGET_DB_88F6720
Stefan Roese	b9f41bf	2015-12-21 13:40:37 +0100	[diff] [blame]	296	default "db-88f6820-gp" if TARGET_DB_88F6820_GP
Chris Packham	a90dd4c	2016-09-22 12:56:14 +1200	[diff] [blame]	297	default "db-88f6820-amc" if TARGET_DB_88F6820_AMC
Stefan Roese	5c806f1	2016-10-25 10:56:19 +0200	[diff] [blame]	298	default "mvebu_armada-8k" if TARGET_MVEBU_ARMADA_8K
Konstantin Porotchkin	1d6ff1f	2021-03-16 17:20:57 +0100	[diff] [blame]	299	default "mvebu_armada-8k" if TARGET_OCTEONTX2_CN913x
Stefan Roese	b9f41bf	2015-12-21 13:40:37 +0100	[diff] [blame]	300	default "db-mv784mp-gp" if TARGET_DB_MV784MP_GP
Tony Dinh	6aebc1a	2023-02-09 14:00:03 -0800	[diff] [blame]	301	default "ds116" if TARGET_DS116
Phil Sutter	d76eba6	2015-12-25 14:41:25 +0100	[diff] [blame]	302	default "ds414" if TARGET_DS414
Stefan Roese	b9f41bf	2015-12-21 13:40:37 +0100	[diff] [blame]	303	default "maxbcm" if TARGET_MAXBCM
Tony Dinh	63eba13	2023-02-01 15:13:05 -0800	[diff] [blame]	304	default "n2350" if TARGET_N2350
Stefan Roese	459e064	2016-01-20 08:13:29 +0100	[diff] [blame]	305	default "theadorable" if TARGET_THEADORABLE
Marek Behún	09e16b8	2017-06-09 19:28:45 +0200	[diff] [blame]	306	default "turris_omnia" if TARGET_TURRIS_OMNIA
Marek Behún	f835bed	2018-04-24 17:21:31 +0200	[diff] [blame]	307	default "turris_mox" if TARGET_TURRIS_MOX
Baruch Siach	daa6f08	2018-06-18 21:56:23 +0300	[diff] [blame]	308	default "controlcenterdc" if TARGET_CONTROLCENTERDC
Chris Packham	b55b2c9	2019-01-10 21:01:00 +1300	[diff] [blame]	309	default "x530" if TARGET_X530
Chris Packham	7325f1f	2023-07-10 10:47:36 +1200	[diff] [blame]	310	default "x240" if TARGET_X240
Chris Packham	199e318	2019-04-11 22:22:53 +1200	[diff] [blame]	311	default "db-xc3-24g4xg" if TARGET_DB_XC3_24G4XG
Luka Kovacic	25acb8b	2020-05-26 20:17:50 +0200	[diff] [blame]	312	default "crs3xx-98dx3236" if TARGET_CRS3XX_98DX3236
Chris Packham	67b7d50	2022-11-05 17:24:00 +1300	[diff] [blame]	313	default "mvebu_alleycat-5" if TARGET_MVEBU_ALLEYCAT5
Stefan Roese	b9f41bf	2015-12-21 13:40:37 +0100	[diff] [blame]	314
				315	config SYS_VENDOR
				316	default "Marvell" if TARGET_DB_MV784MP_GP
Konstantin Porotchkin	7f8dfea	2017-02-16 13:52:22 +0200	[diff] [blame]	317	default "Marvell" if TARGET_MVEBU_ARMADA_37XX
Stefan Roese	9106ed0	2016-01-29 09:14:54 +0100	[diff] [blame]	318	default "Marvell" if TARGET_DB_88F6720
Stefan Roese	b9f41bf	2015-12-21 13:40:37 +0100	[diff] [blame]	319	default "Marvell" if TARGET_DB_88F6820_GP
Chris Packham	a90dd4c	2016-09-22 12:56:14 +1200	[diff] [blame]	320	default "Marvell" if TARGET_DB_88F6820_AMC
Stefan Roese	5c806f1	2016-10-25 10:56:19 +0200	[diff] [blame]	321	default "Marvell" if TARGET_MVEBU_ARMADA_8K
Konstantin Porotchkin	1d6ff1f	2021-03-16 17:20:57 +0100	[diff] [blame]	322	default "Marvell" if TARGET_OCTEONTX2_CN913x
Chris Packham	199e318	2019-04-11 22:22:53 +1200	[diff] [blame]	323	default "Marvell" if TARGET_DB_XC3_24G4XG
				324	default "Marvell" if TARGET_MVEBU_DB_88F7040
Stefan Roese	b9f41bf	2015-12-21 13:40:37 +0100	[diff] [blame]	325	default "solidrun" if TARGET_CLEARFOG
Dennis Gilmore	77c3940	2018-06-11 19:39:53 -0500	[diff] [blame]	326	default "kobol" if TARGET_HELIOS4
Tony Dinh	6aebc1a	2023-02-09 14:00:03 -0800	[diff] [blame]	327	default "Synology" if TARGET_DS116
Phil Sutter	d76eba6	2015-12-25 14:41:25 +0100	[diff] [blame]	328	default "Synology" if TARGET_DS414
Tony Dinh	63eba13	2023-02-01 15:13:05 -0800	[diff] [blame]	329	default "thecus" if TARGET_N2350
Marek Behún	09e16b8	2017-06-09 19:28:45 +0200	[diff] [blame]	330	default "CZ.NIC" if TARGET_TURRIS_OMNIA
Marek Behún	f835bed	2018-04-24 17:21:31 +0200	[diff] [blame]	331	default "CZ.NIC" if TARGET_TURRIS_MOX
Baruch Siach	daa6f08	2018-06-18 21:56:23 +0300	[diff] [blame]	332	default "gdsys" if TARGET_CONTROLCENTERDC
Chris Packham	b55b2c9	2019-01-10 21:01:00 +1300	[diff] [blame]	333	default "alliedtelesis" if TARGET_X530
Chris Packham	7325f1f	2023-07-10 10:47:36 +1200	[diff] [blame]	334	default "alliedtelesis" if TARGET_X240
Luka Kovacic	25acb8b	2020-05-26 20:17:50 +0200	[diff] [blame]	335	default "mikrotik" if TARGET_CRS3XX_98DX3236
Chris Packham	67b7d50	2022-11-05 17:24:00 +1300	[diff] [blame]	336	default "Marvell" if TARGET_MVEBU_ALLEYCAT5
Stefan Roese	b9f41bf	2015-12-21 13:40:37 +0100	[diff] [blame]	337
Stefan Roese	383e0c1	2015-08-25 13:18:38 +0200	[diff] [blame]	338	config SYS_SOC
				339	default "mvebu"
				340
Marek Behún	09e16b8	2017-06-09 19:28:45 +0200	[diff] [blame]	341	choice
Baruch Siach	8d196a4	2018-06-18 21:56:24 +0300	[diff] [blame]	342	prompt "Boot method"
Joel Johnson	a2018ab	2020-04-17 01:19:05 -0600	[diff] [blame]	343	depends on SPL
Marek Behún	09e16b8	2017-06-09 19:28:45 +0200	[diff] [blame]	344
Baruch Siach	8d196a4	2018-06-18 21:56:24 +0300	[diff] [blame]	345	config MVEBU_SPL_BOOT_DEVICE_SPI
Pali Rohár	8d11032	2023-01-10 23:13:01 +0100	[diff] [blame]	346	bool "NOR flash (SPI or parallel)"
Joel Johnson	a2018ab	2020-04-17 01:19:05 -0600	[diff] [blame]	347	imply ENV_IS_IN_SPI_FLASH
Pali Rohár	cf97b82	2021-07-23 11:14:29 +0200	[diff] [blame]	348	imply SPL_DM_SPI
				349	imply SPL_SPI_FLASH_SUPPORT
				350	imply SPL_SPI_LOAD
Simon Glass	a582047	2021-08-08 12:20:14 -0600	[diff] [blame]	351	imply SPL_SPI
Pali Rohár	a3a38e5	2021-07-23 11:14:25 +0200	[diff] [blame]	352	select SPL_BOOTROM_SUPPORT
Marek Behún	09e16b8	2017-06-09 19:28:45 +0200	[diff] [blame]	353
Pali Rohár	5c5cf60	2023-01-10 22:55:21 +0100	[diff] [blame]	354	config MVEBU_SPL_BOOT_DEVICE_NAND
				355	bool "NAND flash (SPI or parallel)"
				356	select MTD_RAW_NAND
				357	select SPL_BOOTROM_SUPPORT
				358
Baruch Siach	8d196a4	2018-06-18 21:56:24 +0300	[diff] [blame]	359	config MVEBU_SPL_BOOT_DEVICE_MMC
Pali Rohár	8d11032	2023-01-10 23:13:01 +0100	[diff] [blame]	360	bool "eMMC or SD card"
Joel Johnson	a2018ab	2020-04-17 01:19:05 -0600	[diff] [blame]	361	imply ENV_IS_IN_MMC
				362	# GPIO needed for eMMC/SD card presence detection
Pali Rohár	cf97b82	2021-07-23 11:14:29 +0200	[diff] [blame]	363	imply SPL_DM_GPIO
				364	imply SPL_DM_MMC
				365	imply SPL_GPIO
				366	imply SPL_LIBDISK_SUPPORT
Simon Glass	b58bfe0	2021-08-08 12:20:09 -0600	[diff] [blame]	367	imply SPL_MMC
Pali Rohár	cefdc03	2023-01-08 13:31:41 +0100	[diff] [blame]	368	select SUPPORT_EMMC_BOOT if SPL_MMC
Pali Rohár	aa6244e	2023-01-09 00:52:09 +0100	[diff] [blame]	369	select SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR if SPL_MMC
Pali Rohár	a3a38e5	2021-07-23 11:14:25 +0200	[diff] [blame]	370	select SPL_BOOTROM_SUPPORT
Marek Behún	09e16b8	2017-06-09 19:28:45 +0200	[diff] [blame]	371
Baruch Siach	b936a27	2019-05-16 13:03:58 +0300	[diff] [blame]	372	config MVEBU_SPL_BOOT_DEVICE_SATA
				373	bool "SATA"
Simon Glass	081a45a	2021-08-08 12:20:17 -0600	[diff] [blame]	374	imply SPL_SATA
Pali Rohár	cf97b82	2021-07-23 11:14:29 +0200	[diff] [blame]	375	imply SPL_LIBDISK_SUPPORT
Pali Rohár	a3a38e5	2021-07-23 11:14:25 +0200	[diff] [blame]	376	select SPL_BOOTROM_SUPPORT
Baruch Siach	b936a27	2019-05-16 13:03:58 +0300	[diff] [blame]	377
Pali Rohár	ea87690	2023-01-10 23:09:15 +0100	[diff] [blame]	378	config MVEBU_SPL_BOOT_DEVICE_PEX
				379	bool "PCI Express"
				380	select SPL_BOOTROM_SUPPORT
				381
Baruch Siach	b35c447	2018-06-18 21:56:26 +0300	[diff] [blame]	382	config MVEBU_SPL_BOOT_DEVICE_UART
				383	bool "UART"
Pali Rohár	a3a38e5	2021-07-23 11:14:25 +0200	[diff] [blame]	384	select SPL_BOOTROM_SUPPORT
Baruch Siach	b35c447	2018-06-18 21:56:26 +0300	[diff] [blame]	385
Marek Behún	09e16b8	2017-06-09 19:28:45 +0200	[diff] [blame]	386	endchoice
				387
Pali Rohár	5c5cf60	2023-01-10 22:55:21 +0100	[diff] [blame]	388	config MVEBU_SPL_NAND_BADBLK_LOCATION
				389	hex "NAND Bad block indicator location"
				390	depends on MVEBU_SPL_BOOT_DEVICE_NAND
				391	range 0x0 0x1
				392	help
				393	Value 0x0 = SLC flash = BBI at page 0 or page 1
				394	Value 0x1 = MLC flash = BBI at last page in the block
				395
Pali Rohár	7085f82	2023-03-29 21:25:58 +0200	[diff] [blame]	396	config MVEBU_SPL_SATA_BLKSZ
				397	int "SATA block size"
				398	depends on MVEBU_SPL_BOOT_DEVICE_SATA
				399	range 512 32768
				400	default 512
				401	help
				402	Block size of the SATA disk in bytes.
				403	Typically 512 bytes for majority of disks
				404	and 4096 bytes for 4K Native disks.
				405
Mario Six	10d1449	2017-01-11 16:01:00 +0100	[diff] [blame]	406	config MVEBU_EFUSE
				407	bool "Enable eFuse support"
Mario Six	10d1449	2017-01-11 16:01:00 +0100	[diff] [blame]	408	depends on HAVE_MVEBU_EFUSE
				409	help
				410	Enable support for reading and writing eFuses on mvebu SoCs.
				411
				412	config MVEBU_EFUSE_FAKE
				413	bool "Fake eFuse access (dry run)"
Mario Six	10d1449	2017-01-11 16:01:00 +0100	[diff] [blame]	414	depends on MVEBU_EFUSE
				415	help
				416	This enables a "dry run" mode where eFuses are not really programmed.
				417	Instead the eFuse accesses are emulated by writing to and reading
				418	from a memory block.
				419	This is can be used for testing prog scripts.
				420
Pali Rohár	2662d2c	2022-09-22 13:43:45 +0200	[diff] [blame]	421	config MVEBU_EFUSE_VHV_GPIO
				422	string "VHV_Enable GPIO name for eFuse programming"
				423	depends on MVEBU_EFUSE && !ARMADA_3700
				424	help
				425	The eFuse programing (burning) phase requires supplying 1.8V to the
				426	device on the VHV power pin, while for normal operation the VHV power
				427	rail must be left unconnected. See Marvell AN-389: ARMADA VHV Power
				428	document (Doc. No. MV-S302545-00 Rev. C, August 2, 2016) for details.
				429	.
				430	This specify VHV_Enable GPIO name used in U-Boot for enabling VHV power.
				431
				432	config MVEBU_EFUSE_VHV_GPIO_ACTIVE_LOW
				433	bool "VHV_Enable GPIO is Active Low"
				434	depends on MVEBU_EFUSE_VHV_GPIO != ""
				435
Mario Six	10d1449	2017-01-11 16:01:00 +0100	[diff] [blame]	436	config SECURED_MODE_IMAGE
				437	bool "Build image for trusted boot"
				438	default false
				439	depends on 88F6820
				440	help
				441	Build an image that employs the ARMADA SoC's trusted boot framework
				442	for securely booting images.
				443
				444	config SECURED_MODE_CSK_INDEX
				445	int "Index of active CSK"
				446	default 0
				447	depends on SECURED_MODE_IMAGE
				448
Tony Dinh	89dc46d	2023-03-02 19:27:29 -0800	[diff] [blame]	449	config SF_DEFAULT_SPEED
				450	int "Default speed for SPI flash in Hz"
				451	default 10000000
				452	depends on MVEBU_SPL_BOOT_DEVICE_SPI
				453
				454	config SF_DEFAULT_MODE
				455	hex "Default mode for SPI flash"
				456	default 0x0
				457	depends on MVEBU_SPL_BOOT_DEVICE_SPI
				458
Joel Johnson	28bf4ca	2020-03-23 14:21:32 -0600	[diff] [blame]	459	source "board/solidrun/clearfog/Kconfig"
Dennis Gilmore	838e49b	2020-12-08 21:07:36 -0600	[diff] [blame]	460	source "board/kobol/helios4/Kconfig"
Joel Johnson	28bf4ca	2020-03-23 14:21:32 -0600	[diff] [blame]	461
Stefan Roese	383e0c1	2015-08-25 13:18:38 +0200	[diff] [blame]	462	endif