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Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Michal Simek952d5142007-03-11 13:42:58 +01002/*
Michal Simek4e39ea82018-07-13 08:26:28 +02003 * (C) Copyright 2007-2018 Michal Simek
Michal Simek952d5142007-03-11 13:42:58 +01004 *
Michal Simek4e39ea82018-07-13 08:26:28 +02005 * Michal SIMEK <monstr@monstr.eu>
Michal Simek952d5142007-03-11 13:42:58 +01006 */
7
Shreenidhi Shediffced402018-07-15 02:34:35 +05308/*
9 * This is a board specific file. It's OK to include board specific
10 * header files
11 */
Michal Simek952d5142007-03-11 13:42:58 +010012
13#include <common.h>
Michal Simekdda9bd82007-03-30 22:52:09 +020014#include <config.h>
Michal Simek4e39ea82018-07-13 08:26:28 +020015#include <dm.h>
16#include <dm/lists.h>
Michal Simek65e915c2014-05-08 16:08:44 +020017#include <fdtdec.h>
Michal Simek9cabb362012-07-04 13:12:37 +020018#include <asm/processor.h>
Michal Simek9c817f82007-05-07 19:33:51 +020019#include <asm/microblaze_intc.h>
20#include <asm/asm.h>
Michal Simek23ccda02013-04-24 10:01:20 +020021#include <asm/gpio.h>
Shreenidhi Shedi1f8fcbb2018-07-15 02:05:40 +053022#include <dm/uclass.h>
23#include <wdt.h>
Michal Simek23ccda02013-04-24 10:01:20 +020024
Michal Simek65e915c2014-05-08 16:08:44 +020025DECLARE_GLOBAL_DATA_PTR;
26
Shreenidhi Shedi1f8fcbb2018-07-15 02:05:40 +053027#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_WDT)
28static struct udevice *watchdog_dev;
29#endif /* !CONFIG_SPL_BUILD && CONFIG_WDT */
30
Michal Simek65e915c2014-05-08 16:08:44 +020031ulong ram_base;
32
Simon Glass2f949c32017-03-31 08:40:32 -060033int dram_init_banksize(void)
Michal Simek65e915c2014-05-08 16:08:44 +020034{
35 gd->bd->bi_dram[0].start = ram_base;
36 gd->bd->bi_dram[0].size = get_effective_memsize();
Simon Glass2f949c32017-03-31 08:40:32 -060037
38 return 0;
Michal Simek65e915c2014-05-08 16:08:44 +020039}
40
41int dram_init(void)
42{
43 int node;
44 fdt_addr_t addr;
45 fdt_size_t size;
46 const void *blob = gd->fdt_blob;
47
48 node = fdt_node_offset_by_prop_value(blob, -1, "device_type",
49 "memory", 7);
50 if (node == -FDT_ERR_NOTFOUND) {
51 debug("DRAM: Can't get memory node\n");
52 return 1;
53 }
54 addr = fdtdec_get_addr_size(blob, node, "reg", &size);
55 if (addr == FDT_ADDR_T_NONE || size == 0) {
56 debug("DRAM: Can't get base address or size\n");
57 return 1;
58 }
59 ram_base = addr;
60
61 gd->ram_top = addr; /* In setup_dest_addr() is done +ram_size */
62 gd->ram_size = size;
63
64 return 0;
65};
Michal Simek65e915c2014-05-08 16:08:44 +020066
Shreenidhi Shedi1f8fcbb2018-07-15 02:05:40 +053067#ifdef CONFIG_WDT
68/* Called by macro WATCHDOG_RESET */
69void watchdog_reset(void)
70{
71#if !defined(CONFIG_SPL_BUILD)
72 ulong now;
73 static ulong next_reset;
74
75 if (!watchdog_dev)
76 return;
77
78 now = timer_get_us();
79
80 /* Do not reset the watchdog too often */
81 if (now > next_reset) {
82 wdt_reset(watchdog_dev);
83 next_reset = now + 1000;
84 }
85#endif /* !CONFIG_SPL_BUILD */
86}
87#endif /* CONFIG_WDT */
Michal Simek9c817f82007-05-07 19:33:51 +020088
Michal Simek01525242015-12-11 15:01:28 +010089int board_late_init(void)
Michal Simek9cabb362012-07-04 13:12:37 +020090{
Shreenidhi Shedi1f8fcbb2018-07-15 02:05:40 +053091#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_WDT)
92 watchdog_dev = NULL;
93
94 if (uclass_get_device_by_seq(UCLASS_WDT, 0, &watchdog_dev)) {
95 debug("Watchdog: Not found by seq!\n");
96 if (uclass_get_device(UCLASS_WDT, 0, &watchdog_dev)) {
97 puts("Watchdog: Not found!\n");
98 return 0;
99 }
100 }
101
102 wdt_start(watchdog_dev, 0, 0);
103 puts("Watchdog: Started\n");
104#endif /* !CONFIG_SPL_BUILD && CONFIG_WDT */
Michal Simek4e39ea82018-07-13 08:26:28 +0200105#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_SYSRESET_MICROBLAZE)
106 int ret;
Shreenidhi Shedi1f8fcbb2018-07-15 02:05:40 +0530107
Michal Simek4e39ea82018-07-13 08:26:28 +0200108 ret = device_bind_driver(gd->dm_root, "mb_soft_reset",
109 "reset_soft", NULL);
110 if (ret)
111 printf("Warning: No reset driver: ret=%d\n", ret);
112#endif
Michal Simek01525242015-12-11 15:01:28 +0100113 return 0;
Michal Simek9cabb362012-07-04 13:12:37 +0200114}